Re: Single stepping in mips

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Hi,

> On most MIPS processors there is no singlestepping feature.  You have to
> manual insert a breakpoint into the instruction stream and deal with the
> exception.
>
>   Ralf

But if we insert a Break point into the instruction stream the exception
will be generated before the execution of the real instruction.
That means.
If we have the following set of instructions

addr1: instr1
addr2: instr2
addr3: instr3


if we replace instr1 by break.

addr1: break
addr2: instr2
addr3: instr3

we will get a break point exception as soon as the break
in addr1 is executed (correct me if I have wrongly understood !! )

But the need is to raise an exception after instr1 (at addr1) is executed.
One solution is using a break at instr2 (at addr2).
But suppose instr1 is a jmp then there is no point
in keeping a break at addr2.
(inorder to raise an exception after instr1 is executed).

So is there some other clean way for this ?


Regards and Thanks
KK













[Index of Archives]     [Linux MIPS Home]     [LKML Archive]     [Linux ARM Kernel]     [Linux ARM]     [Linux]     [Git]     [Yosemite News]     [Linux SCSI]     [Linux Hams]

  Powered by Linux