Single stepping in mips

["Krishnakumar. R" <krishnakumar@naturesoft.net>]

Hi,

How can we single step through an instruction 
in mips architecture. 

In intel 386 architecture if we set TF flag
of the EFLAGS register a trap will be generated
after every instruction. Is there a way in 
mips to do the same. 

Regards and Thanks
KK