On Mon, Apr 14, 2003 at 03:29:03PM +0900, Atsushi Nemoto wrote: > >>>>> On Mon, 14 Apr 2003 05:50:38 +0200, Ralf Baechle <ralf@linux-mips.org> said: > ralf> Excellent. This should provide a good performance boost for the > ralf> TX49 also as disabling the I-cache during the flush made the > ralf> operation even slower than it has to be. > > Thank you for quick response. > > One more request. Please enclose R4600_V1_HIT_CACHEOP_WAR and > R4600_V2_HIT_CACHEOP_WAR with appropriate CONFIG_CPU_XXX. I do not > know what CPUs need this workaround... (at least TX49 does not need > this) I'll leave it unconditionally enabled for now because the Makefiles could behave in undefined ways if multiple CONFIG_CPU_* options are selected and quite a few systems support both the R4600 and other processors like the Indy. Another day. Ralf
