On Thu, 3 Apr 2003, Dominic Sweetman wrote: > The length of the burst is encoded in the bus command sent out by the > R4000 at the beginning of a read or write cycle. For the system to > work, the memory controller has to be able to do the right thing for > both of the lengths which might happen... [...] > This is true: for L2-equipped chips I assume you can't see the > difference between I- and D-. Ah sure -- now I see where a fault in my consideration is. While thinking of SC chips, I forgot of the existence of PC ones -- certainly if the Magnum used a PC configuration, its chipset could easily observe a change of a p-cache line size. -- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available +
