Delayed jumps and branches

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Hi,

I have been going through my mips architecture book learning about the delay
slots used in loads, jumps and branches and I am in need of some clarification.
The instruction just after the jump instruction is always executed wether the
jump is taken or not, right? So the compiler can re-aarange the assembly to
take advantage of this, but if no instruction (that can be executed wether the
jump is taken or not) can be placed after the jump, a nop is used intstead. So
take this code for example :

    jal <my_function>
    li  $s2, 3
    li  $v0, 2

If the jump is not taken, it requires 3 cycles to execute these 3 instructions.
If the jump is taken, it requires 3 cycles to execute the first instruction of
my_function, and li $s2, 3 is executed.

Is my reasoning correct?

Thanks
Gareth



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