On Tue, 3 Sep 2002, Jun Sun wrote: > Right now setting per-cpu timers is totally left to the board-dependent code. > Once we see more SMP boxes using this approach, I think it starts to be > interesting to make some abstraction and support it in a systematic way, > including support for using CPU counter as the per-cpu timer interrupt. > > Using local_timer_emulation sounds like an attractive alternative to me, as we > only need to set up one system-wide timer interrupt. Conceptually it probably > takes a little longer to run through timer_interrupt (due to IPI calls). But > if the hit on performance is very negligible, the simplicity might make it > worthwile. Well, the i386 approach (with a grain of salt, of course, but it's about the most mature, anyway) seems reasonable. A per-CPU local timer for scheduling (no need to stability or high precision) and an external timer interrupt for timekeeping (this one precise) that's delivered to a single CPU at a time. I hope there are no MIPS SMP systems that lack an external timer IRQ source. -- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available +
