On Mon, Oct 01, 2001 at 12:10:53PM +0200, Jakub Jelinek wrote: > The way soft-fp interprets Quiet NaNs is not just Intel-way, e.g. SPARC, > Alpha work the same way. E.g. on SPARC, signalling NaN is exp=max, > f=.0xxxxxxxxxx...xxx where at least one of the x bits is set, quiet NaN is > exp=max, f=.1xxxxxxxxxx...xxxxxx. > If MIPS has it backwards, Yes indeed. From the Mips32 spec I have handy: Unbiased E f s b1 Value V Typical Single Bit Pattern E_max+1 != 0 x 1 SNaN 16#7fffffff E_max+1 != 0 x 0 QNaN 16#7fbfffff r~
