> > > > > I have a question to ask about eret. > > > > > > > > In RC4xxx/RC32334, after eret finished, does it automatically enable > > IE > > > > bit of STATUS register? > > > > > > ERET does not influence the state of the IE bit. > > > > I agree with you, but the RC32334 User manual (14-13 section) say it does > > and say we must run a "CLI" just before eret to disable IE bit in Status > > register . > > That has a different reason. Eret takes the return address from the > EPC register and if you'd take an exception between restoring that and the > eret you'd loose it's content - crash boom bang. Yes. But in the sourece codes, when we finish the exception handlers , we will run "ret_from_irq" (ret_from_sys_call) in the entry.S and then run macro "RESTORE_ALL_AND_RET". The macro does restore all registers and then ERET. But there is not a "CLI" just before ERET as the user manual suggested. Why? so when we handle a syscall exception, we do "STI" in the handle_sys(). and when ret_from_sys_call and we will run this macro "RESTORE_ALL_AND_RET". because there is not a "CLI" just before ERET , is it possible to have some problems? machael thailer
