"Kevin D. Kissell" wrote:
>
> > I looked at the code and it appears this config may not work properly.
> >
> > My understanding is that if CPU has been running with cache enabled, and,
> > presummably, have many dirty cache entries, and if you suddenly change
> config
> > register to run kernel uncached, you *don't* get all the dirty cache lines
> > flushed into memory. Therefore, you will be accessing stale data in
> memory.
> >
> > Is this right? If so, we need a better way to run CPU uncached.
> >
> > In the past, I have been a private patch to do so. It seems pretty
> difficult
> > to come up a generic, because we want to figure out the CPU type and
> disable
> > cache *before* kernel starts to modify any memory content.
>
> Since the kernel cache attribute is never initialized before
> ld_mmu_{whatever} is invoked, and since that Config field
> does not have a well-defined reset state on many MIPS
> CPUs, it would appear that we are in effect trusting the
> bootloader to have done something reasonable like
> set kseg0 to be non-cachable or write-through, either
> of which would be safe for the current code.
I think you just proposed a fix: check current config register when we turn
off cache. Thanks. :-)
Jun
