On Wed, May 16, 2001 at 04:27:27PM -0700, Matthew Dharm wrote: > Attached is a patch which adds support for extended interrupt devices > to the Ocelot. It was created against a current CVS snapshot. Ralf, > please apply. > > The patch basically re-writes the interrupt handler to read the > extended interrupt mask from the Set 1 registers on the QED RM7000. > It also changes the support functions so that these interrupts can be > masked and unmasked properly. > > It occurs to me that this probably should go (eventually) into an > RM7k-specific file, and not an Ocelot specific file. But the current > arch/mips/ tree doesn't seem to support this well, so I figured that > for a first pass, keeping everything where it current is will cause > the least confusion. > The best way to support RM7K extended interrupts is to use the new irq.c and write rm7k irq controller code, (e.g., irq_cpu_rm7k.c). It should be similar to one I sent out (irq_cpu.c file) a while back. If you cannot find it, I can send you again. The modification to the common files looks a little bit instrusive. But I won't complain if Ralf does not - he usually has a higher standard. :-) Jun
