We will port w83792d.c to linux-2.6

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Hi Patrick, Jean, MDS, Rudolf

Good News:
I solved the problem we meet on ALI M1563 chipset just now by modifying
the driver i2c-ali1563.c( especially the function ali1563_transaction()):
replace the codes:
		!(data & HST_STS_DONE) ? "Transaction Never Finished " : "");

	if (!(data & HST_STS_DONE))
		/* Issue 'kill' to host controller */
		outb_p(HST_CNTL2_KILL,SMB_HST_CNTL2);
	else
		/* Issue timeout to reset all devices on bus */
		outb_p(HST_CNTL1_TIMEOUT,SMB_HST_CNTL1);
	return -1;

with:
	return 0;

I attached the driver in this mail, you may just diff it with the original
one in linux kernel 2.6.10 to find all the modified codes.

Dear Patrick,
Would you please modify your driver in a more neat way than mine, so that
my W83792D driver can work on it? When you finished, I'd like to test it
for you. :-)

Maybe the reason that i2c-ali1563.c for linux-2.4(backported by me) can NOT
work is same as this problem, I will modify my i2c-ali1563.c for linux-2.4
next week when I'm free, if it can work too, it's too great! :-)


Thanks
Best Regards
Chunhao


> -----Original Message-----
> From: Jean Delvare [mailto:khali at linux-fr.org]
> Sent: 2005??3??11?? 03:41
> To: Patrick Mochel
> Cc: PI14 HUANG0; PI10 LHHsu; PI14 DZSHEN; sensors at Stimpy.netroedge.com; PI13
> CFLi
> Subject: Re: We will port w83792d.c to linux-2.6
> 
> Hi Patrick,
> 
> > Note that while not *identical*, the controller shares a lot of
> > similarities with the i810 driver.
> 
> I assume i801.
> 
> > In SMB_HST_STS (offset 0), bit 6 is "ISUSE_STS", which reads a 0 the
> > first time after the device is reset, then a 1 after that. Seems like
> > it can be used to check if the deivce is ready to be used after a
> > reset..
> 
> Thanks for the info. Incidentally it might help me with a problem I have
> with the i2c-viapro driver. You would be surprised how many common
> points there are between the various SMBus masters found on x86
> motherboards.
> 
> I guess that this bit is read-only?
> 
> According to the source, bit 7 is "DONE". I guess it is read-only as
> well, and set after a successful transaction?
> 
> If bit 5 used for anything?
> 
> > It says that it only happens at address 0x58. Is there a device there?
> > If there is, perhaps you could try increasing the timeout?
> 
> I would guess that 0x58 is the value of the register, which is 7 bits of
> address and 1 bit of R/W. So the device address would rather be 0x44
> (0x58 >> 1). It happens that 0x44 is a special address for SMBus 2.0, if
> I am not mistaken.
> 
> I don't know much more, unfortunately.
> 
> Anyway thanks Patrick for the info.
> 
> --
> Jean Delvare


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