On Wed, Dec 08, 2004 at 10:53:55PM +0100, Jean Delvare wrote: > > > > /* default: SMBus, no SMI#, enable host controller */ > > > > pci_write_config_byte(pcidev, I801_PCI_HOSTC, 0x01); > > > > pci_read_config_byte(pcidev, I801_PCI_HOSTC, &temp); > > > > > > And after that you don't use temp... Am I missing something? > > > > This is commonly done to ensure that the write actually hits the bus > > before the code continues. Otherwise, the write could happen at some > > later point in time. The read after a write ensures that everything > > is synced up properly. > > That's odd. Is is a hardware issue or is it implied by the way the PCI > accesses are handled by Linux itself? It's implied by the way the PCI bus works, it's not a Linux thing at all. thanks, greg k-h
