> Well, I am no way a hardware guy but I would like to figure out why > it's slow using I2C bus > then I searched the net. Accroding to the above page, the speed is > 100Khz, well, it's indeed slow. > No wonder we can feel human sensible delay while reading ALL > registers. I wish SMBus masters were really operating at this speed. That would be fast! ;) If you take a look at real SMBus master datasheets, you'll find that they drive the bus at a lower speed. For example my Intel ICH3-M chip drives the SMBus between 10 and 16 kHz according to the datasheet. Indeed, a quick real-world measure led me to ~15 kHz. Slow as hell... At this operating frequency, if you only use regular byte data reads, you can't expect a read rate faster than 500 reg/s. This emphasizes the need for SMBus chip manufacturers to implement faster read methods such as continuous byte reads (using autoincrement) or even I2C or SMBus block reads where possible. Continuous byte reads at the same operating frequency would lead to maybe 700 reg/s, and block reads to 1500 reg/s or so. -- Jean Delvare http://khali.linux-fr.org/
