On Fri, Oct 05, 2012 at 09:21:40AM -0700, Adrian Chadd wrote:
> On 5 October 2012 05:34, Felix Fietkau <nbd@xxxxxxxxxxx> wrote:
>
> > ---
> > --- a/drivers/net/wireless/ath/ath9k/ani.c
> > +++ b/drivers/net/wireless/ath/ath9k/ani.c
> > @@ -307,7 +307,8 @@ void ath9k_ani_reset(struct ath_hw *ah,
> > if (IS_CHAN_2GHZ(chan)) {
> > ah->ani_function = (ATH9K_ANI_SPUR_IMMUNITY_LEVEL |
> > ATH9K_ANI_FIRSTEP_LEVEL);
> > - if (AR_SREV_9300_20_OR_LATER(ah))
> > + if (AR_SREV_9300_20_OR_LATER(ah) &&
> > + ah->caps.rx_chainmask != 1)
> > ah->ani_function |= ATH9K_ANI_MRC_CCK;
> > } else
> > ah->ani_function = 0;
>
> Well, is it a RX chainmask thing, or is it a chip thing?
>
> It's totally possible to have an RX chainmask of say 0x2 or 0x4..
What are you trying to tell us?
> Also to figure out which registers triggered the interrupt is likely
> going to be a bit .. special. Maybe keep a circular buffer of the last
> N register accesses and dump them in time order whenever you get an
> interrupt.
Maybe you missed that part of the conversation, but this was exactly what I
did. You can even find one of my debug patches which implements it (but many
fancy hacks are missing).
Kind regards,
Sven
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