>
> On Wed, 2011-08-17 at 08:16 -0700, Stanislaw Gruszka wrote:
> > On Tue, Aug 16, 2011 at 07:23:52PM +0300, Grumbach, Emmanuel wrote:
> > > > Simply by adding to iwl_priv different struct ops/data for each
> upper
> > > > layer you will have. You need to have the same thing to clue with
> > > > mac80211, whatever upper layer will be. Otherwise, if mac80211
> clue
> > > > have to be different, new hardware probably needs different
> driver.
> > > >
> > >
> > > I would be reluctant to have all the data / ops needed by all the
> possible HW
> > > all the time in priv. I don't think it is a good idea to have
> unallocated pointers
> > > for a bus that don't need the rings...
> >
> > Not sure why there would be any unallocated pointers.
> >
> > > Instead, I think that having a HW specific area that is allocated
> for each HW is much
> > > nicer and reliable. This is what this patch series is all about.
> > > Furthermore, I don't want the HW layer to dereference iwl_priv,
> >
> > We discussed with Wey upper and lower layer, term HW layer confuse me
> > even more here.
By HW layers I meant lower layers, since these are HW specific
> >
> > Particularly is interesting how do you want to clue driver with
> mac80211
> > having different iwl_priv structures. Also, what for are separate
> > iwl_trans_pcie and iwl_bus_pcie instead of one thing that talk
> > to pcie bus.
> >
You may be right on that one. The functional distinction between iwl_trans_pcie and iwl_bus_pcie isn't very obvious. We may even consider to merge them into one PCIe layer. But that would be on the top of the current patches. I would like to live of bit with the current design, see how we connect the different layers for the new Arch / HW we are having in the pipe to the current code and see what to do then.
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