2010/2/28 Gábor Stefanik <netrolller.3d@xxxxxxxxx>: > The latest patch, which is a partial success according to some > testers, writes to core 1 (PCI-E) instead of core 0 (ChipCommon). Then either I am misinterpreting the logs, or the last patch in this thread is not the patch you are referring to. A successful write/read to PCI config register 0x80 indicates that any following MMIO read/writes will be done on that core, correct? With the lpphy-test.patch you posted earlier, I see the following output from b43: Wrote 0x18003000 to pos 0x80 Read 0x18003000 from pos 0x80 MAP 1 0xf4000000 0xffffc900225b8000 0x4000 0x0 0 [snip some mmio read/writes and some PCI config read/writes] Wrote 0x18000000 to pos 0x80 Read 0x18000000 from pos 0x80 R 4 1 0xf400280a 0x6dbe 0x0 0 W 4 1 0xf400280a 0xedbe 0x0 0 This first maps core 3, does some read/writes with it, then maps core 0, and sets bit 0x8000, correct? Also, is the address space limited to the 4k range? wl maps core 1, but sets bit 0x8000 at address 0x280a, which when added to 0x18001000 is 0x1800380a, right in the PCIE cores address space (for address 0x100a). And finally, unless the linux-wireless@xxxxxxxxxxxxxxx mailing list is currently down as well, I think gmail may be the one causing my messages to not be delivered to the list, as my last message isn't showing up on the linux-wireless list either. -Nate -- To unsubscribe from this list: send the line "unsubscribe linux-wireless" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
