On Sun, 2009-01-25 at 11:41 -0500, Bob Copeland wrote:
> On Sat, Jan 24, 2009 at 3:12 AM, Alina Friedrichsen <x-alina@xxxxxxx> wrote:
> > {
> > ATH5K_TRACE(ah->ah_sc);
> >
> > - ath5k_hw_reg_write(ah, 0x00000000, AR5K_TSF_L32);
> > - ath5k_hw_reg_write(ah, (tsf64 >> 32) & 0xffffffff, AR5K_TSF_U32);
> > ath5k_hw_reg_write(ah, tsf64 & 0xffffffff, AR5K_TSF_L32);
> > + ath5k_hw_reg_write(ah, (tsf64 >> 32) & 0xffffffff, AR5K_TSF_U32);
> > }
>
> Perhaps there is an internal latch on this pair; that may explain why
> you need to write low->high order.
Either way, I think the changelog should back up the claim by
_something_. Even if it's just "tested on device XXX, old way doesn't
work, new way does" or "looked at legacy HAL code" or ...
johannes
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