On Tue, Jan 16, 2024 at 11:41:19AM +0100, David Woodhouse wrote: > If we had had this posted interrupt support from the beginning, perhaps > we could have have a much simpler model — we just let the guest write > its intended (v)CPU#/vector *directly* to the MSI table in the device, > and let the IOMMU fix it up by having a table pointing to the > appropriate set of vCPUs. But that isn't how it happened. The model we > have is that the VMM has to *emulate* the config space and handle the > interrupts as described above. I do have a strong desire to rework things to be more like this, just not time yet :) We have enough real problems related to the fake interrupt data in the guest. This ath11k thing sounds more like IMS really - it makes zero sense that a device would be designed where the MSI vector has to be copied to another location - most likely the other location is another interrupt source that can be programmed independently, with its own irqchip, etc? Linux supports this now. Thomas and Intel did it to support SIOV IMS. Are you sure you have implemented your Linux driver correctly? :) Of course IMS doesn't work in VMs, but that is a big motivation to fix the irq organizing. At least you'd know why the device is broken :) Jason
