On Fri, Nov 17, 2023 at 11:44:23AM +0200, Ilpo Järvinen wrote:
> Instead of open coding the capability structure search, find the PM
> Capability using pci_find_capability().
>
> While at it, rename the generic 'cap_pointer' to 'pm_cap' which makes
> the intent of the code more obvious.
>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@xxxxxxxxxxxxxxx>
> ---
> .../wireless/realtek/rtlwifi/rtl8821ae/hw.c | 49 +++----------------
> 1 file changed, 8 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c b/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c
> index 53cfeed0b030..7877509c34c7 100644
> --- a/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c
> +++ b/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c
> @@ -2270,42 +2270,11 @@ static void _rtl8821ae_clear_pci_pme_status(struct ieee80211_hw *hw)
> {
> struct rtl_priv *rtlpriv = rtl_priv(hw);
> struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
> - u16 cap_hdr;
> - u8 cap_pointer;
> - u8 cap_id = 0xff;
> u8 pmcs_reg;
> - u8 cnt = 0;
> + u8 pm_cap;
>
> - /* Get the Capability pointer first,
> - * the Capability Pointer is located at
> - * offset 0x34 from the Function Header */
> -
> - pci_read_config_byte(rtlpci->pdev, 0x34, &cap_pointer);
> - rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
> - "PCI configuration 0x34 = 0x%2x\n", cap_pointer);
> -
> - do {
> - pci_read_config_word(rtlpci->pdev, cap_pointer, &cap_hdr);
> - cap_id = cap_hdr & 0xFF;
> -
> - rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
> - "in pci configuration, cap_pointer%x = %x\n",
> - cap_pointer, cap_id);
> -
> - if (cap_id == 0x01) {
> - break;
> - } else {
> - /* point to next Capability */
> - cap_pointer = (cap_hdr >> 8) & 0xFF;
> - /* 0: end of pci capability, 0xff: invalid value */
> - if (cap_pointer == 0x00 || cap_pointer == 0xff) {
> - cap_id = 0xff;
> - break;
> - }
> - }
> - } while (cnt++ < 200);
> -
> - if (cap_id != 0x01) {
> + pm_cap = pci_find_capability(rtlpci->pdev, PCI_CAP_ID_PM);
Hahaha, good work.
> + if (!pm_cap) {
> rtl_dbg(rtlpriv, COMP_INIT, DBG_WARNING,
> "Cannot find PME Capability\n");
> return;
> @@ -2314,22 +2283,20 @@ static void _rtl8821ae_clear_pci_pme_status(struct ieee80211_hw *hw)
> /* Get the PM CSR (Control/Status Register),
> * The PME_Status is located at PM Capatibility offset 5, bit 7
Same comment typo and PCI_PM_CTRL, PCI_PM_CTRL_PME_STATUS comments as
before.
> - pci_read_config_byte(rtlpci->pdev, cap_pointer + 5, &pmcs_reg);
> + pci_read_config_byte(rtlpci->pdev, pm_cap + 5, &pmcs_reg);
>
> if (pmcs_reg & BIT(7)) {
> /* Clear PME_Status with write */
> - pci_write_config_byte(rtlpci->pdev, cap_pointer + 5,
> - pmcs_reg);
> + pci_write_config_byte(rtlpci->pdev, pm_cap + 5, pmcs_reg);
> /* Read it back to check */
> - pci_read_config_byte(rtlpci->pdev, cap_pointer + 5,
> - &pmcs_reg);
> + pci_read_config_byte(rtlpci->pdev, pm_cap + 5, &pmcs_reg);
> rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
> "Clear PME status 0x%2x to 0x%2x\n",
> - cap_pointer + 5, pmcs_reg);
> + pm_cap + 5, pmcs_reg);
> } else {
> rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
> "PME status(0x%2x) = 0x%2x\n",
> - cap_pointer + 5, pmcs_reg);
> + pm_cap + 5, pmcs_reg);
> }
> }
>
> --
> 2.30.2
>
