On Fri, Nov 17, 2023 at 11:44:22AM +0200, Ilpo Järvinen wrote:
> Check if PM capability does not exists and return early which follows
> the usual error handling pattern.
>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@xxxxxxxxxxxxxxx>
> ---
> .../wireless/realtek/rtlwifi/rtl8821ae/hw.c | 45 ++++++++++---------
> 1 file changed, 23 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c b/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c
> index 6ae37d61a2a2..53cfeed0b030 100644
> --- a/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c
> +++ b/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c
> @@ -2305,30 +2305,31 @@ static void _rtl8821ae_clear_pci_pme_status(struct ieee80211_hw *hw)
> }
> } while (cnt++ < 200);
>
> - if (cap_id == 0x01) {
> - /* Get the PM CSR (Control/Status Register),
> - * The PME_Status is located at PM Capatibility offset 5, bit 7
> - */
> - pci_read_config_byte(rtlpci->pdev, cap_pointer + 5, &pmcs_reg);
> -
> - if (pmcs_reg & BIT(7)) {
> - /* Clear PME_Status with write */
> - pci_write_config_byte(rtlpci->pdev, cap_pointer + 5,
> - pmcs_reg);
> - /* Read it back to check */
> - pci_read_config_byte(rtlpci->pdev, cap_pointer + 5,
> - &pmcs_reg);
> - rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
> - "Clear PME status 0x%2x to 0x%2x\n",
> - cap_pointer + 5, pmcs_reg);
> - } else {
> - rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
> - "PME status(0x%2x) = 0x%2x\n",
> - cap_pointer + 5, pmcs_reg);
> - }
> - } else {
> + if (cap_id != 0x01) {
> rtl_dbg(rtlpriv, COMP_INIT, DBG_WARNING,
> "Cannot find PME Capability\n");
> + return;
> + }
> +
> + /* Get the PM CSR (Control/Status Register),
> + * The PME_Status is located at PM Capatibility offset 5, bit 7
s/Capatibility/Capability/
But this is PCI_PM_CTRL and PCI_PM_CTRL_PME_STATUS (with a word read),
right? No need for a comment then.
I don't know why the driver needs to do this, but I'm skeptical. The
only other drivers that look at PCI_PM_CTRL_PME_STATUS themselves are
bnx2x and ksz884xp (ksz884x.c), so this is highly suspicious.
> + */
> + pci_read_config_byte(rtlpci->pdev, cap_pointer + 5, &pmcs_reg);
> +
> + if (pmcs_reg & BIT(7)) {
> + /* Clear PME_Status with write */
> + pci_write_config_byte(rtlpci->pdev, cap_pointer + 5,
> + pmcs_reg);
> + /* Read it back to check */
> + pci_read_config_byte(rtlpci->pdev, cap_pointer + 5,
> + &pmcs_reg);
> + rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
> + "Clear PME status 0x%2x to 0x%2x\n",
> + cap_pointer + 5, pmcs_reg);
> + } else {
> + rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
> + "PME status(0x%2x) = 0x%2x\n",
> + cap_pointer + 5, pmcs_reg);
> }
> }
>
> --
> 2.30.2
>
