On February 8, 2023 5:02:32 AM Hector Martin <marcan@xxxxxxxxx> wrote:
On 05/02/2023 22.02, Hector Martin wrote:On 05/02/2023 21.44, Jonas Gorski wrote:On Sun, 5 Feb 2023 at 07:58, Arend Van Spriel <arend.vanspriel@xxxxxxxxxxxx> wrote:- stale Cypress emails On February 5, 2023 3:50:41 AM Hector Martin <marcan@xxxxxxxxx> wrote:On 03/02/2023 02.19, Arend Van Spriel wrote:On February 2, 2023 6:25:28 AM "'Hector Martin' via BRCM80211-DEV-LIST,PDL" <brcm80211-dev-list.pdl@xxxxxxxxxxxx> wrote:On 31/01/2023 23.17, Jonas Gorski wrote:On Tue, 31 Jan 2023 at 12:36, Hector Martin <marcan@xxxxxxxxx> wrote:These device IDs are only supposed to be visible internally, in devices without a proper OTP. They should never be seen in devices in the wild, so drop them to avoid confusion.I think these can still show up in embedded platforms where the OTP/SPROM is provided on-flash. E.g. https://forum.archive.openwrt.org/viewtopic.php?id=55367&p=4 shows this bootlog on an BCM4709A0 router with two BCM43602 wifis: [ 3.237132] pci 0000:01:00.0: [14e4:aa52] type 00 class 0x028000 [ 3.237174] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit] [ 3.237199] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit] [ 3.237302] pci 0000:01:00.0: supports D1 D2 ... [ 3.782384] pci 0001:03:00.0: [14e4:aa52] type 00 class 0x028000 [ 3.782440] pci 0001:03:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit] [ 3.782474] pci 0001:03:00.0: reg 0x18: [mem 0x00000000-0x003fffff 64bit] [ 3.782649] pci 0001:03:00.0: supports D1 D2 0xaa52 == 43602 (BRCM_PCIE_43602_RAW_DEVICE_ID) Rafał can probably provide more info there. Regards JonasArend, any comments on these platforms?Huh? I already replied to that couple of days ago or did I only imagine doing that.I don't see any replies from you on the lists (or my inbox) to Jonas' email.Accidentally sent that reply to internal mailing list. So quoting myself here: """ Shaking the tree helps ;-) What is meant by "OTP/SPROM is provided on-flash"? I assume you mean that it is on the host side and the wifi PCIe device can not access it when it gets powered up. Maybe for this scenario we should have a devicetree compatible to configure the device id, but that does not help any current users of these platforms. Thanks for providing this info.That's what I meant, the wifi chip itself does not have any (valid) OTP/SPROM attached/populated, and requires the driver to setup the values at runtime based on the host SoC's flash contents (most likely NVRAM contents). This was the case in about 99% of embedded systems based on MIPS bcm47xx/bcm63xx, where the wifi chips then always identified themselves with their raw chip IDs as PCI device IDs (even leading to one or two ID conflicts ...). I have to admit I don't know how much this is still an issue on current (ARM) systems, but at least that one BCM4709A one suggests this is still happening in "recent" designs. Probably because it saves half a cent per board or so ;-) Regards JonasAs far as I know the OTP is built into the chips themselves, and even Apple (who refuses to put per-device calibration data in OTP these days and loads it from DT) still manages to burn in the proper device ID and basic info at least... so I'm not sure how this saves any money. I thought chips weren't supposed to even leave Broadcom without at least an ID burned in? - HectorI'd like to move forward with this. Should I send a v3 without the RAW ID removal?
Yeah. Need to consider the options for solving this.Programming the OTP is a manufacturing step done by OEM so I think they save having to implement that step in production and it is not so much chip cost saving.
Our proprietary driver is setup so it is probed for any PCI device with network class and then it uses NVRAM to obtain the PCI devid.
Regards, Arend
Attachment:
smime.p7s
Description: S/MIME Cryptographic Signature
