Re: Current mainline brcmfmac reports error on supposedly supported ap6256 chip

[Arend van Spriel <arend.vanspriel@xxxxxxxxxxxx>]

+ linux-wireless, + Ondrej (who added support for 4345 rev 9)

On 7/25/2021 12:16 AM, Piotr Oniszczuk wrote:
> > Wiadomość napisana przez Arend van Spriel <arend.vanspriel@xxxxxxxxxxxx> w dniu 24.07.2021, o godz. 23:20:
> >
> >
> > I am not so sure what is going on so maybe you can apply the patch below and see what comes out.
> >
> > Regards,
> > Arend
> >
> > diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c
> > index 4faab0170ffa..71fb34753528 100644
> > --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c
> > +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c
> > @@ -691,9 +691,11 @@ static u32 brcmf_chip_tcm_ramsize(struct brcmf_core_priv *cr4)
> >         nbb = (corecap & ARMCR4_TCBBNB_MASK) >> ARMCR4_TCBBNB_SHIFT;
> >         totb = nab + nbb;
> >
> > +       brcmf_err("corecap %x nab %u nbb %u\n", corecap, nab, nbb);
> >         for (idx = 0; idx < totb; idx++) {
> >                 brcmf_chip_core_write32(cr4, ARMCR4_BANKIDX, idx);
> >                 bxinfo = brcmf_chip_core_read32(cr4, ARMCR4_BANKINFO);
> > +               brcmf_err("[%3u] %08x\n", idx, bxinfo);
> >                 memsize += ((bxinfo & ARMCR4_BSZ_MASK) + 1) * ARMCR4_BSZ_MULT;
> >         }
>
> Arend
>
> Pls find dmesg output with patch:
>
> [  121.226458] brcmfmac: brcmfmac_module_init No platform data available.
> [  121.227955] brcmfmac: brcmf_sdio_probe Enter
> [  121.232119] brcmfmac: F1 signature read @0x18000000=0x15294345
> [  121.237659] brcmfmac: brcmf_chip_recognition found AXI chip: BCM4345/9
> [  121.245832] brcmfmac: brcmf_chip_cores_check  [1 ] core 0x800:51 base 0x18000000 wrap 0x18100000
> [  121.252695] brcmfmac: brcmf_chip_cores_check  [2 ] core 0x812:54 base 0x18001000 wrap 0x18101000
> [  121.261363] brcmfmac: brcmf_chip_cores_check  [3 ] core 0x83e:9  base 0x18002000 wrap 0x18102000
> [  121.270071] brcmfmac: brcmf_chip_cores_check  [4 ] core 0x83c:14 base 0x18003000 wrap 0x18103000
> [  121.278783] brcmfmac: brcmf_chip_cores_check  [5 ] core 0x829:21 base 0x18004000 wrap 0x18104000
> [  121.287508] brcmfmac: brcmf_chip_cores_check  [6 ] core 0x135:0  base 0x00000000 wrap 0x18107000
> [  121.296206] brcmfmac: brcmf_chip_cores_check  [7 ] core 0x240:0  base 0x00000000 wrap 0x00000000
> [  121.304917] brcmfmac: brcmf_chip_set_passive Enter
> [  121.312079] brcmfmac: brcmf_chip_tcm_ramsize: corecap 0 nab 0 nbb 0

Well. That explains the fact that RAM size ends up being zero. I want to 
be sure the ARM CR4 core is up so can you retry using the patch below. 
It is just getting bit more info, no fix.

Regards,
Arend

diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c 
b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c
index 4faab0170ffa..b829ad2f3865 100644
--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c
+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c
@@ -691,9 +691,12 @@ static u32 brcmf_chip_tcm_ramsize(struct 
brcmf_core_priv *cr4)
        nbb = (corecap & ARMCR4_TCBBNB_MASK) >> ARMCR4_TCBBNB_SHIFT;
        totb = nab + nbb;

+       brcmf_err("up %d corecap %x nab %u nbb %u\n",
+               brcmf_chip_iscoreup(&cr4->pub), corecap, nab, nbb);
        for (idx = 0; idx < totb; idx++) {
                brcmf_chip_core_write32(cr4, ARMCR4_BANKIDX, idx);
                bxinfo = brcmf_chip_core_read32(cr4, ARMCR4_BANKINFO);
+               brcmf_err("[%3u] %08x\n", idx, bxinfo);
                memsize += ((bxinfo & ARMCR4_BSZ_MASK) + 1) * 
ARMCR4_BSZ_MULT;
        }