On 11/12/2018 8:29 AM, Chi-Hsien Lin wrote:
From: Naveen Gupta <naveen.gupta@xxxxxxxxxxx> The number of words that the read FIFO has to contain except the end of frame before sends data back to the host. Max watermark = (512B - 2* (BurstLength))/4 = (512 - 128)/4 = 384/4 = 0x60 so if burst length (i.e. BurstLength = 64) is increased, watermark has to be reduced. This is the optimal setting for this chip. Reviewed-by: Arend van Spriel <arend.vanspriel@xxxxxxxxxxxx> Signed-off-by: Naveen Gupta <naveen.gupta@xxxxxxxxxxx> Signed-off-by: Chi-Hsien Lin <chi-hsien.lin@xxxxxxxxxxx> --- drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c index 7707b0169c21..e1708e297d07 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c @@ -52,6 +52,7 @@ /* watermark expressed in number of words */ #define DEFAULT_F2_WATERMARK 0x8 #define CY_4373_F2_WATERMARK 0x40 +#define CY_43012_F2_WATERMARK 0x60
So basically you increase queuing in firmware rx path. How does this affect TCP latency. The DMA error obviously needs fixing, but why go from a watermark of 32 bytes to the maximum of 384 bytes. Same question for 4373.
Regards, Arend
