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RE: [ath9k-devel] [PATCHv2] ath9k_hw: Handle AR_INTR_SYNC_HOST1_FATAL on AR9003

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I can reproduce this issue on my AR9300 chip using compat-wireless-3.6.8-1 without any patch except Sven's patch on ar9003_hw_get_isr() to handle AR_INTR_SYNC_HOST1_FATAL.

I just start two hostapd to driver a wireless AP(ath1, see hostapd1.conf) and a guest AP(ath2, see hostapd2.conf), the hardware will stop working after I restart these APs a lot of times, the number of ath9k interrupts stop increasing. At this time, I can't discovery these two SSIDs on my client PC even though hostapds are working well. 

just start one hostapd seems don't have this issue, just start two hostapd to drive two wireless APs still have this issue but rarely to reproduce. pls see reproduce.sh in the attachment.

I can see "ath: phy0: Failed to stop TX DMA, queues=0x001!" in the dmesg, which was output when ath_isr() receive AR_INTR_SYNC_HOST1_FATAL and try to reset the hardware.

I also record the register access like what Sven did, but I think it is different with Sven's case, since nobody called ar9003_hw_ani_control(), pls check the dmesg info in the attachment. I also test Felix F's patch on ar9003_hw_ani_control(), this issue still reproduce on my device. 

here is my register record when the issue happened,  just need to trace the reg whose address is 0x4028, after 4 times ath9k_conf_tx(), I receive a AR_INTR_SYNC_HOST1_FATAL value. 

time, record idx, line, func, Begin|End|Write|Read, reg, val, pid, comm
[  214.856089] 3116.[0454][ath_isr][B] 0000 00000000 0 swapper
[  214.856102] 3117.[0760][ath9k_hw_intrpend][R] 4038 00000002 0 swapper
[  214.856116] 3118.[0189][ar9003_hw_get_isr][R] 4038 00000002 0 swapper
[  214.856130] 3119.[0192][ar9003_hw_get_isr][R] 7044 00000002 0 swapper
[  214.856144] 3120.[0194][ar9003_hw_get_isr][R] 0080 81000002 0 swapper
[  214.856157] 3121.[0198][ar9003_hw_get_isr][R] 4028 00000000 0 swapper <-- REG_READ(0x4028) = 0x0, no problem here
[  214.856171] 3122.[0234][ar9003_hw_get_isr][R] 00c0 81000002 0 swapper
[  214.856185] 3123.[0781][ath9k_hw_kill_interrupts][W] 0024 00000000 0 swapper
[  214.856200] 3124.[0782][ath9k_hw_kill_interrupts][R] 0024 00000000 0 swapper
[  214.856214] 3125.[0784][ath9k_hw_kill_interrupts][W] 403c 00000000 0 swapper
[  214.856228] 3126.[0785][ath9k_hw_kill_interrupts][R] 403c 00000000 0 swapper
[  214.856243] 3127.[0787][ath9k_hw_kill_interrupts][W] 402c 00000000 0 swapper
[  214.856257] 3128.[0788][ath9k_hw_kill_interrupts][R] 402c 00000000 0 swapper
[  214.856271] 3129.[0566][ath_isr][E] 0000 00000000 0 swapper

[  214.856284] 3130.[0371][ath9k_tasklet][B] 0000 00000000 0 swapper
[  214.856297] 3131.[2876][ath9k_hw_gettsf64][R] 8050 00000000 0 swapper
[  214.856311] 3132.[2878][ath9k_hw_gettsf64][R] 804c 0004f6d1 0 swapper
[  214.856325] 3133.[2879][ath9k_hw_gettsf64][R] 8050 00000000 0 swapper
[  214.856339] 3134.[0445][ath9k_hw_addrxbuf_edma][W] 0078 18a38040 0 swapper
[  214.856354] 3135.[0828][ath9k_hw_enable_interrupts][W] 0024 00000001 0 swapper
[  214.856368] 3136.[0830][ath9k_hw_enable_interrupts][W] 403c 00000002 0 swapper
[  214.856383] 3137.[0831][ath9k_hw_enable_interrupts][W] 4030 00000002 0 swapper
[  214.856397] 3138.[0833][ath9k_hw_enable_interrupts][W] 402c 00023f60 0 swapper
[  214.856412] 3139.[0834][ath9k_hw_enable_interrupts][W] 4034 00023f60 0 swapper
[  214.856427] 3140.[0837][ath9k_hw_enable_interrupts][R] 00a0 81800175 0 swapper
[  214.856441] 3141.[0837][ath9k_hw_enable_interrupts][R] 0024 00000001 0 swapper
[  214.856455] 3142.[0428][ath9k_tasklet][E] 0000 00000000 0 swapper

[  214.856469] 3143.[1396][ath9k_conf_tx][B] 0000 00000000 2639 hostapd
[  214.856483] 3144.[0404][ath9k_hw_resettxqueue][W] 1040 00101c03 2639 hostapd
[  214.856498] 3145.[0409][ath9k_hw_resettxqueue][W] 1080 0008200a 2639 hostapd
[  214.856512] 3146.[0411][ath9k_hw_resettxqueue][W] 09c0 00000800 2639 hostapd
[  214.856527] 3147.[0418][ath9k_hw_resettxqueue][W] 1100 00001102 2639 hostapd
[  214.856541] 3148.[0436][ath9k_hw_resettxqueue][W] 10c0 001005e0 2639 hostapd
[  214.856556] 3149.[0517][ath9k_hw_resettxqueue][W] 0a44 00000001 2639 hostapd
[  214.856571] 3150.[0034][ath9k_hw_set_txq_interrupts][W] 00a4 0000030f 2639 hostapd
[  214.856586] 3151.[0037][ath9k_hw_set_txq_interrupts][W] 00a8 0000030f 2639 hostapd
[  214.856601] 3152.[0041][ath9k_hw_set_txq_interrupts][W] 00ac 00c00000 2639 hostapd
[  214.856615] 3153.[1421][ath9k_conf_tx][E] 0000 00000000 2639 hostapd

[  214.856629] 3154.[1396][ath9k_conf_tx][B] 0000 00000000 2639 hostapd
[  214.856643] 3155.[0404][ath9k_hw_resettxqueue][W] 1044 00103c07 2639 hostapd
[  214.856657] 3156.[0409][ath9k_hw_resettxqueue][W] 1084 0008200a 2639 hostapd
[  214.856672] 3157.[0411][ath9k_hw_resettxqueue][W] 09c4 00000800 2639 hostapd
[  214.856686] 3158.[0418][ath9k_hw_resettxqueue][W] 1104 00001102 2639 hostapd
[  214.856701] 3159.[0436][ath9k_hw_resettxqueue][W] 10c4 00100bc0 2639 hostapd
[  214.856715] 3160.[0517][ath9k_hw_resettxqueue][W] 0a44 00000001 2639 hostapd
[  214.856730] 3161.[0034][ath9k_hw_set_txq_interrupts][W] 00a4 0000030f 2639 hostapd
[  214.856745] 3162.[0037][ath9k_hw_set_txq_interrupts][W] 00a8 0000030f 2639 hostapd
[  214.856760] 3163.[0041][ath9k_hw_set_txq_interrupts][W] 00ac 00c00000 2639 hostapd
[  214.856774] 3164.[1421][ath9k_conf_tx][E] 0000 00000000 2639 hostapd

[  214.856788] 3165.[1396][ath9k_conf_tx][B] 0000 00000000 2639 hostapd
[  214.856802] 3166.[0404][ath9k_hw_resettxqueue][W] 1048 0030fc0f 2639 hostapd
[  214.856817] 3167.[0409][ath9k_hw_resettxqueue][W] 1088 0008200a 2639 hostapd
[  214.856831] 3168.[0411][ath9k_hw_resettxqueue][W] 09c8 00000800 2639 hostapd
[  214.856846] 3169.[0418][ath9k_hw_resettxqueue][W] 1108 00001102 2639 hostapd
[  214.856860] 3170.[0436][ath9k_hw_resettxqueue][W] 10c8 00000000 2639 hostapd
[  214.856875] 3171.[0517][ath9k_hw_resettxqueue][W] 0a44 00000001 2639 hostapd
[  214.856889] 3172.[0034][ath9k_hw_set_txq_interrupts][W] 00a4 0000030f 2639 hostapd
[  214.856904] 3173.[0037][ath9k_hw_set_txq_interrupts][W] 00a8 0000030f 2639 hostapd
[  214.856919] 3174.[0041][ath9k_hw_set_txq_interrupts][W] 00ac 00c00000 2639 hostapd
[  214.856934] 3175.[1421][ath9k_conf_tx][E] 0000 00000000 2639 hostapd

[  214.856947] 3176.[1396][ath9k_conf_tx][B] 0000 00000000 2639 hostapd
[  214.856961] 3177.[0404][ath9k_hw_resettxqueue][W] 104c 007ffc0f 2639 hostapd
[  214.856976] 3178.[0409][ath9k_hw_resettxqueue][W] 108c 0008200a 2639 hostapd
[  214.856990] 3179.[0411][ath9k_hw_resettxqueue][W] 09cc 00000800 2639 hostapd
[  214.857005] 3180.[0418][ath9k_hw_resettxqueue][W] 110c 00001102 2639 hostapd
[  214.857019] 3181.[0436][ath9k_hw_resettxqueue][W] 10cc 00000000 2639 hostapd
[  214.857034] 3182.[0517][ath9k_hw_resettxqueue][W] 0a44 00000001 2639 hostapd
[  214.857048] 3183.[0034][ath9k_hw_set_txq_interrupts][W] 00a4 0000030f 2639 hostapd
[  214.857063] 3184.[0037][ath9k_hw_set_txq_interrupts][W] 00a8 0000030f 2639 hostapd
[  214.857078] 3185.[0041][ath9k_hw_set_txq_interrupts][W] 00ac 00c00000 2639 hostapd
[  214.857093] 3186.[1421][ath9k_conf_tx][E] 0000 00000000 2639 hostapd

[  214.857106] 3187.[0454][ath_isr][B] 0000 00000000 2639 hostapd
[  214.857120] 3188.[0760][ath9k_hw_intrpend][R] 4038 00000000 2639 hostapd
[  214.857134] 3189.[0767][ath9k_hw_intrpend][R] 4028 00000020 2639 hostapd
[  214.857148] 3190.[0189][ar9003_hw_get_isr][R] 4038 00000000 2639 hostapd
[  214.857162] 3191.[0198][ar9003_hw_get_isr][R] 4028 00000020 2639 hostapd  <---- REG_READ(0x4028) = 0x20, raise a  AR_INTR_SYNC_HOST1_FATAL error

I did some tests, such as
1. add delay(1000) after ath9k_conf_tx(), but can't resolve this issue.
2. add a spinlock sc->sc_reset_lock to protect the hardware between ath_reset_work() and other reset contexts, but can't resolve this issue.

Now I have no idea what to do, any suggestion will be appreciated. 

- Felix Liao

-----Original Message-----
From: linux-wireless-owner@xxxxxxxxxxxxxxx [mailto:linux-wireless-owner@xxxxxxxxxxxxxxx] On Behalf Of Felix Fietkau
Sent: Saturday, October 06, 2012 5:04 PM
To: Adrian Chadd
Cc: Sven Eckelmann; Simon Wunderlich; linux-wireless@xxxxxxxxxxxxxxx; linville@xxxxxxxxxxxxx; mcgrof@xxxxxxxxxxxxxxxx; ath9k-devel@xxxxxxxxxxxxxxx; lindner_marek@xxxxxxxx
Subject: Re: [ath9k-devel] [PATCHv2] ath9k_hw: Handle AR_INTR_SYNC_HOST1_FATAL on AR9003

On 2012-10-06 1:48 AM, Adrian Chadd wrote:
> On 5 October 2012 09:51, Sven Eckelmann <sven@xxxxxxxxxxxxx> wrote:
> 
>>> Well, is it a RX chainmask thing, or is it a chip thing?
>>>
>>> It's totally possible to have an RX chainmask of say 0x2 or 0x4..
>>
>> What are you trying to tell us?
> 
> That the check for "rx chainmask == 1? Definitely can't do MRC CCK"
> implying "rx chainmask != 1? Definitely can do MRC CCK."
> I think that's the wrong logic. It may be a general chipset problem
> across some/all AR9300 and later chips that doing MRC CCK with only
> one RX chain enabled is a problem, or it may be a single-chain NIC
> problem.
> 
> I'm pretty sure we can configure any of the RX antennas; it doesn't
> have to be "one chain == chain 0."
> 
> Anywy. I'll double check that.
I'm pretty sure it's an issue specific to single-stream chipsets, where
all MRC functionality was left out (and thus the register access leads
nowhere).
I don't think this needs to consider multi-stream chipsets with only one
enabled chain.

- Felix

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Attachment: debug_failed_to_stop_tx_dma.tar.gz
Description: debug_failed_to_stop_tx_dma.tar.gz


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