On Mon, Dec 18, 2023 at 11:37:38PM +0800, Ji Sheng Teoh wrote: > On Mon, 18 Dec 2023 15:41:37 +0100 > Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> wrote: > > > On 18/12/2023 15:27, Ji Sheng Teoh wrote: > > >> > > >> I have real doubts that you ever tested your entire solution with > > >> this binding. Where is the DTS? > > >> > > > > > > Currently, the DTS is still in internal and yet to upstream as it > > > depends on [1]. > > > > Yeah, so you send untested code which cannot work or pass tests. If > > you do not test your code, we need to be able to at least verify it, > > so send your DTS. Otherwise I cannot trust that this works at all. > > > Will submit it with DTS once things have cleared up. > Thanks for the comment. [1] is not going to applied for a while since the SoC doesn't actually exist yet and is pre-tapeout on an FPGA. I would just send the dts patch adding the watchdog alongside the series, or else you'll be waiting for quite a while. Or even link to the node on github or whatever.
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