> > {
> > u32 portsc, lpm, sts = 0;
> >
> > switch (ci->platdata->phy_mode) {
> > case USBPHY_INTERFACE_MODE_UTMI:
> > portsc = PORTSC_PTS(PTS_UTMI);
> > @@ -273,10 +275,12 @@ static void hw_phymode_configure(struct ci_hdrc
> *ci)
> >
> > if (ci->hw_bank.lpm) {
> > hw_write(ci, OP_DEVLC, DEVLC_PTS(7) | DEVLC_PTW, lpm);
> > - hw_write(ci, OP_DEVLC, DEVLC_STS, sts);
> > + if (sts)
> > + hw_write(ci, OP_DEVLC, DEVLC_STS, sts);
> > } else {
> > hw_write(ci, OP_PORTSC, PORTSC_PTS(7) | PORTSC_PTW, portsc);
> > - hw_write(ci, OP_PORTSC, PORTSC_STS, sts);
> > + if ( sts )
> > + hw_write(ci, OP_PORTSC, PORTSC_STS, sts);
>
> The conditions coding style is broken.
>
> > }
> > }
>
> Still don't get why a system with ehci compliant PORTSC register
> should not want to have the sts bit _explicitly_ set to 0 if
> we don't use serial phy mode. So NACK!
>
At current code the PORTSC_STS is set to unknown value due to sts is
uninitialized, and it causes ARM internal error at Chris's imx27 platform.
This patch just gives sts an initialized value, and only set PORTSC_STS
for serial phy, it follows the code original logic mostly.
Until now, no one reports problem due to the wrong value of PORTSC_STS, it means
both 1 and 0 are working for most of platforms. So, just keep its current logic
until someone blames.
The chipidea datasheet said "This bit has no effect unless Parallel Transceiver Select is set to UTMI+.",
my imx6 uses UTIM+, but the controller works fine whether PORTSC_STS is 0 or 1.
My original idea is just delete the code about PORTSC_STS, but chris
mentions it is used by serial phy at current logic, then, just keep current logic.
Peter
> Michael
>
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