Hi, On Monday 21 October 2013 04:49 PM, Arokux X wrote: > Dear Kishon, > > thank you for the answer, no problem it was late! Your understanding > is almost correct. > >> From whatever I could understand, you have a USB HOST controller (each HOST >> controller has an EHCI controller and a companion OHCI controller?). There are >> separate clocks for each of EHCI and OHCI controller. EHCI and OHCI has >> separate PHYs. Both these PHYs are fed by the same common clock. And you have a >> separate reset bits for each of the PHYs. > > EHCI and OHCI have the same PHY. And this PHY has a reset bit. This is > exactly what bothers me. Because there should be something central to > both EHCI and OHCI which manages this reset bit, i.e. the bit should > be cleared if and only if both EHCI and OHCI controllers are unloaded > (as modules). I have done a nice picture of the hardware here, please > take a look at it: > > http://linux-sunxi.org/User:Arokux#USB_Host_Hardware > > I've just realized that there is another commo thing for EHCI and OHCI > - a GPIO which turns on the power to the USB_VBUS. The power should be > supplied if at least one of the EHCI or OHCI is loaded. This again > needs some central management. > > So to summarize, I have two things (reset bit and GPIO for the > USB_VBUS) which are common to EHCI and OHCI and need to be managed > outside of the EHCI/OHCI bus glue drivers. My exact question is: where > this management should be done? Are there good examples in the kernel > already? Probably you can have a look at drivers/mfd/omap-usb-host.c in mainline kernel. Thanks Kishon -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
