Hi, On Fri, Oct 11, 2013 at 01:13:57AM +0800, Huang Rui wrote: > On Thu, Oct 10, 2013 at 11:26:47AM -0500, Felipe Balbi wrote: > > HI, > > > > On Thu, Oct 10, 2013 at 11:45:47PM +0800, Huang Rui wrote: > > > On Thu, Oct 10, 2013 at 10:10:52AM -0500, Felipe Balbi wrote: > > > > On Tue, Oct 08, 2013 at 10:28:29AM -0400, Alan Stern wrote: > > > > > > I also have a question for host and device mode switch at DWC3 > > > controller with on PCI bus. I saw omap glue get extcon cable state to > > > identify ID pin, am I right? > > > > > > if (extcon_get_cable_state(edev, "USB-HOST") == true) > > > dwc3_omap_set_mailbox(omap, OMAP_DWC3_ID_GROUND); > > > > > > But I don't find any similar identification on PCI glue. So how PCI > > > glue execute this action? > > > > OMAP is peculiar. Long story short, IP team always gives us some "nice" > > easter eggs heh. In this case, ID pin status doesn't go straight from > > transceiver to dwc3. Transceiver doesn't even know about the ID pin (or > > vbus) states, those two lines are routed to a discrete comparator and we > > need to manually write those to that mailbox you see. > > > > So do you mean omap is able to use any other external connector to > identify ID pin status, not only use transceiver? no, I mean that OMAP's internal PHYs don't know anything about the analog side of USB (VBUS and ID comparators) so you need discretest to take care of that. That creates the need for some mechanism to pass VBUS and ID status to the internal PHYs and to DWC3, that mechanism is the mailbox you see us fiddling with. > > On PCI land I'm assuming this won't be the case and ID/VBUS lines are > > routed directly to a PHY with internal VBUS and ID comparators. If you > > want to *force* the IP into host mode, there's a debugfs for that. Just > > write "host" to /sys/kernel/debug/dwc3*/mode. > > > > So if PCI land, we can't use internal ID pin status to switch the > roles between host and device. we only should configure the role at > user space by ourseleves for role switch, am I right? :) it depends on how the IP was integrated and which PHY is used. I can't answer for every possible incarnation of the DWC3 IP using a PCI bridge around it, sorry. In any case, just try it out. 99% of the cases I'd expect the correct cable to switch correct roles. Well, there is the register mirroring problem with DWC3 which I'm tired of discussing in this list and outside of it, so I'd really suggest trying things out and seeing how host and device side registers behave. Hint: some of those registers will corrupt and break functionality. There are quite a few folks working on an acceptable workaround until we have a test setup with dwc3 2.50a. -- balbi
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