RE: xHCI ISR be registered twice

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> On Thu, Aug 08, 2013 at 03:38:53AM +0000, Wang, Yu Y wrote:
> > > Hi Felipe,
> > >
> > > This patch brings up an interesting point: will a dwc3 PCI host use
> > > the xhci platform driver instead of the xhci PCI driver?
> > >
> > > If so, that seems less than ideal.  Won't it not use the standard
> > > xHCI PCI suspend and resume functions if it's registered as a
> > > platform device?  Also, it seems registering it that way means
> XHCI_BROKEN_MSI is set unconditionally.
> > > That leads to the xhci driver not enabling MSI or MSI-X for the PCI
> > > host, which will impact performance.
> > >
> >
> > [Yu:] The upstream dwc3 driver haven't enable power management for the
> > host mode until now. Actually, this is another big changes. In Intel
> > intern tree, I have to wrote another separate file to re-implemented
> > the PM callback to support platform device design. Maybe we need
> > consider to add one new file(hcd-plat.c) which is familiar with hcd-pci.c?
> 
> Felipe, what would be the best approach to add PM support for xhci-plat
> devices?

[Yu:] I talked with Felipe before. The DWC3 controller used in TI SOC, haven't integrate
the hibernation mode feature. So their IP can't support PM. But the DWC3 controller
used by Intel have enabled the hibernation mode. We are consider to upstream it.

But the our DWC3 design have a big difference with DWC3 original driver.For example: we 
have to do soft-reset every time before start host or device mode. So we have to reinitialize
host/device hardware register every switch time. This is requirement from dwc3 spec.

And Felipe's design is not do soft-reset. Then the host/device driver just need to initialization
at first time. And use one register to do host/device mode switch. This design is not working
in Intel mobile platforms.

So if upstream the hibernation feature. I need Felipe approve to make dwc3 driver as two
solutions for role switch design.

Another concern is we can't re-use xHCI standard PM interfaces. Because they are all base on
PCI device design(hcd-pci.c ).

> 
> Sarah Sharp
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