On 07/09/2013 01:59 PM, Felipe Balbi wrote: >> Xenia, I'm not sure what you mean by "the xHC controller and the >> host support 64 bit DMA addresses". The xHC controller is the >> xHCI host. Did you maybe mean "If both the xHCI host and the >> system support 64-bit DMA"? >> >>> For non-pci platforms, the dma_mask pointer is initialized to >>> point to the coherent_dma_mask since the same value will be >>> assigned to both. The DMA mask for PCI is set to 32bit by default [0]. I don't know if the PCI spec hides a bit or two which say that it can do more than that. I know that the ehci limits the DMA mask to 2GiB for some vendors. A bunch of network drivers increase the mask to 64bit depending on the card type (that means to host does not matter). That means if xhci unconditionally supports 64bit addressing we could init at a central point. I don't think ARM/omap5 has a restriction to 32bit only. [0] https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/drivers/pci/probe.c#n1348 Sebastian -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
