Hi, On Mon, Jun 24, 2013 at 12:04:19PM -0400, Alan Stern wrote: > On Mon, 24 Jun 2013, Felipe Balbi wrote: > > > > you wouldn't notice the difference. The DMA engine is the one which > > > > would read the sgtable to figure where the data is scattered, at the end > > > > of the day, SW only knows of a single 1044bytes URB and controller is > > > > required to generate proper USB packets out of that. > > > > > > That simply isn't true. The DMA engine in EHCI, for example, is not > > > capable of constructing a packet out of discontiguous memory buffers. > > > > /me goes read EHCI... > > > > that's a limitation on EHCI though, which can't support data scattered > > around memory. It must be contiguous within that page. It really doesn't > > have anything to do with SGs, right ? > > Right. > > > If EHCI has such a limitation than EHCI alone should have means to > > handle drivers which send data scaterred around memory in small chunks. > > Not only EHCI; also UHCI, OHCI, and I don't know how many others. > This is one of the reasons why David Brownell wrote the USB > Scatter-Gather library code in usbcore. fair enough. > > > Furthermore, if the HCD doesn't have DMA support then we break the > > > transfer up into multiple URBs, each corresponding to a single SG > > > element. The data in the SG buffers do not get rearranged, so you > > > would inevitably end up with a short packet at the end of one of the > > > intermediate URBs. > > > > that's, again, a limitation of the HCD. MUSB can't handle SGs at all, so > > we have to use a contiguous buffer which can hold the entire data to do > > the transfer in that case. > > MUSB shouldn't be copying data to and from bounce buffers just to be > able to handle SG tranfers. well, if we can assume all SG elements to be wMaxPacketSize aligned, we could just break it up into smaller URBs and avoid the copy, but I wasn't aware we could make that assumption in the host side. > > DWC3, OTOH, can handle anything. Your data can be anywhere, and it'll > > just transfer it, we just need to set the 'chain' bit properly to tell > > the internal DMA controller that the USB transfer isn't over yet. > > Maybe the same is true of xHCI; I don't know. In any case, those HCDs > are definitely in the minority. not fair :-p -- balbi
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