Hi, On Mon, Jun 24, 2013 at 11:32:16AM -0400, Alan Stern wrote: > > > >> - the change violates USB spec(1.1/2.0/3.0) > > > > > > > > I can't see how this would violate USB spec. USB specifications > > > > have no knowledge of scatter-gather. > > > > > > > > It really doesn't matter how the data gets into the HW's FIFO, as > > > > long as it *does* get there. IOW an SG table like below: > > > > > > > > sg[0].length = 512 sg[1].length = 512 sg[2].length = 20 > > > > > > > > is no different than: > > > > > > > > sg[0].length = 502 sg[1].length = 512 sg[2].length = 30 > > > > > > > > from the USB perspective, all is sees is 1044 bytes being shifted > > > > through the data lines. > > > > > > It is a little. The first USB packet has 512 vs 502 bytes on the wire. > > > > you wouldn't notice the difference. The DMA engine is the one which > > would read the sgtable to figure where the data is scattered, at the end > > of the day, SW only knows of a single 1044bytes URB and controller is > > required to generate proper USB packets out of that. > > That simply isn't true. The DMA engine in EHCI, for example, is not > capable of constructing a packet out of discontiguous memory buffers. /me goes read EHCI... that's a limitation on EHCI though, which can't support data scattered around memory. It must be contiguous within that page. It really doesn't have anything to do with SGs, right ? If EHCI has such a limitation than EHCI alone should have means to handle drivers which send data scaterred around memory in small chunks. > Furthermore, if the HCD doesn't have DMA support then we break the > transfer up into multiple URBs, each corresponding to a single SG > element. The data in the SG buffers do not get rearranged, so you > would inevitably end up with a short packet at the end of one of the > intermediate URBs. that's, again, a limitation of the HCD. MUSB can't handle SGs at all, so we have to use a contiguous buffer which can hold the entire data to do the transfer in that case. DWC3, OTOH, can handle anything. Your data can be anywhere, and it'll just transfer it, we just need to set the 'chain' bit properly to tell the internal DMA controller that the USB transfer isn't over yet. -- balbi
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