Before, this was initialized in pci.c, after the dwc2_hcd_init was
called and the interrupts were enabled. This opened up a small time
window where common interrupts could be triggered, but there was no
handler for them, causing them to keep triggering infinitely and locking
up the machine.
On my RT3052 board this bug could be easily reproduced by hardcoding
the console log level to 8, so that a bunch of debug output from the dwc2
driver was generated inside this time window. This caused the interrupt
lockup to occur almost every time.
By requesting the irq inside dwc2_core_init and by disabling interrupts
before calling dwc2_core_init instead of after, we can be sure the
handler is registered before the interrupts are enabled, which should
close this window.
Reported-by: Stephen Warren <swarren@xxxxxxxxxxxxx>
Signed-off-by: Matthijs Kooijman <matthijs@xxxxxxxx>
---
drivers/staging/dwc2/core.c | 12 +++++++++++-
drivers/staging/dwc2/core.h | 2 +-
drivers/staging/dwc2/hcd.c | 14 +++++++-------
drivers/staging/dwc2/pci.c | 7 -------
4 files changed, 19 insertions(+), 16 deletions(-)
diff --git a/drivers/staging/dwc2/core.c b/drivers/staging/dwc2/core.c
index 57b6f9a..4bf26dd 100644
--- a/drivers/staging/dwc2/core.c
+++ b/drivers/staging/dwc2/core.c
@@ -371,8 +371,9 @@ static void dwc2_gusbcfg_init(struct dwc2_hsotg *hsotg)
*
* @hsotg: Programming view of the DWC_otg controller
* @select_phy: If true then also set the Phy type
+ * @irq: If >= 0, the irq to register
*/
-int dwc2_core_init(struct dwc2_hsotg *hsotg, bool select_phy)
+int dwc2_core_init(struct dwc2_hsotg *hsotg, bool select_phy, int irq)
{
u32 usbcfg, otgctl;
int retval;
@@ -421,6 +422,15 @@ int dwc2_core_init(struct dwc2_hsotg *hsotg, bool select_phy)
/* Clear the SRP success bit for FS-I2c */
hsotg->srp_success = 0;
+ if (irq >= 0) {
+ dev_dbg(hsotg->dev, "registering common handler for irq%d\n", irq);
+ retval = devm_request_irq(hsotg->dev, irq, dwc2_handle_common_intr,
+ IRQF_SHARED, dev_name(hsotg->dev),
+ hsotg);
+ if (retval)
+ return retval;
+ }
+
/* Enable common interrupts */
dwc2_enable_common_interrupts(hsotg);
diff --git a/drivers/staging/dwc2/core.h b/drivers/staging/dwc2/core.h
index aed18e1..e9acbf1 100644
--- a/drivers/staging/dwc2/core.h
+++ b/drivers/staging/dwc2/core.h
@@ -541,7 +541,7 @@ extern void dwc2_read_packet(struct dwc2_hsotg *hsotg, u8 *dest, u16 bytes);
extern void dwc2_flush_tx_fifo(struct dwc2_hsotg *hsotg, const int num);
extern void dwc2_flush_rx_fifo(struct dwc2_hsotg *hsotg);
-extern int dwc2_core_init(struct dwc2_hsotg *hsotg, bool select_phy);
+extern int dwc2_core_init(struct dwc2_hsotg *hsotg, bool select_phy, int irq);
extern void dwc2_enable_global_interrupts(struct dwc2_hsotg *hcd);
extern void dwc2_disable_global_interrupts(struct dwc2_hsotg *hcd);
extern void dwc2_disable_common_interrupts(struct dwc2_hsotg *hsotg);
diff --git a/drivers/staging/dwc2/hcd.c b/drivers/staging/dwc2/hcd.c
index 3656a3c..2e1e145 100644
--- a/drivers/staging/dwc2/hcd.c
+++ b/drivers/staging/dwc2/hcd.c
@@ -1315,7 +1315,7 @@ static void dwc2_conn_id_status_change(struct work_struct *work)
dev_err(hsotg->dev,
"Connection id status change timed out");
hsotg->op_state = OTG_STATE_B_PERIPHERAL;
- dwc2_core_init(hsotg, false);
+ dwc2_core_init(hsotg, false, -1);
dwc2_enable_global_interrupts(hsotg);
} else {
/* A-Device connector (Host Mode) */
@@ -1334,7 +1334,7 @@ static void dwc2_conn_id_status_change(struct work_struct *work)
hsotg->op_state = OTG_STATE_A_HOST;
/* Initialize the Core for Host mode */
- dwc2_core_init(hsotg, false);
+ dwc2_core_init(hsotg, false, -1);
dwc2_enable_global_interrupts(hsotg);
dwc2_hcd_start(hsotg);
}
@@ -2765,17 +2765,17 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq,
((struct wrapper_priv_data *) &hcd->hcd_priv)->hsotg = hsotg;
hsotg->priv = hcd;
- /* Initialize the DWC_otg core, and select the Phy type */
- retval = dwc2_core_init(hsotg, true);
- if (retval)
- goto error2;
-
/*
* Disable the global interrupt until all the interrupt handlers are
* installed
*/
dwc2_disable_global_interrupts(hsotg);
+ /* Initialize the DWC_otg core, and select the Phy type */
+ retval = dwc2_core_init(hsotg, true, irq);
+ if (retval)
+ goto error2;
+
/* Create new workqueue and init work */
hsotg->wq_otg = create_singlethread_workqueue("dwc_otg");
if (!hsotg->wq_otg) {
diff --git a/drivers/staging/dwc2/pci.c b/drivers/staging/dwc2/pci.c
index 928298a..6e4ee0f 100644
--- a/drivers/staging/dwc2/pci.c
+++ b/drivers/staging/dwc2/pci.c
@@ -155,13 +155,6 @@ static int dwc2_driver_probe(struct pci_dev *dev,
pci_set_drvdata(dev, hsotg);
dev_dbg(&dev->dev, "hsotg=%p\n", hsotg);
- dev_dbg(&dev->dev, "registering common handler for irq%d\n", dev->irq);
- retval = devm_request_irq(&dev->dev, dev->irq, dwc2_handle_common_intr,
- IRQF_SHARED, dev_name(&dev->dev),
- hsotg);
- if (retval)
- dwc2_hcd_remove(hsotg);
-
return retval;
}
--
1.8.0
--
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