Dear Chen Peter-B29397, > > > > I take it in case of multiport system, you'd have one phy per port ? > > > > Or > > > > > > are > > > > there phys that can operate with multiple ULPI inputs (aka. one phy > > > > per > > > > > > multiple > > > > CPU ports)? > > > > > > Just confirm with IC guys, one phy for one port. > > > > Sure, but in general too ? > > I think so, as there can be portsc[n], each portsc stands for individual > phy's state. > > > > > > > So consider this scenario instead. There is no intermediate hub, > > > > but > > > > > > > > there are two devices plugged directly into the root hub: a 3G > > > > modem > > > > > > > > and a flash drive. > > > > > > > > Is this possible on MXS? > > > > > > All i.mx SoCs has one port, including mxs. > > > > So, how can the above scenario happen? > > Marek, you may need to read whole thread to understand the potential corner > case at i.mx (maybe the same for other chipidea controllers) SoC. I was going through it to some extent ... I think I have some idea about the problem. So you're discussing general case, correct? > The potential corner case occurs at 3G triggers resume when the phy is > entering low power mode. > > We have some discussion at FSL internal, there can be backdoor at host > driver if we use otg manages phy framework and this issue really occurs in > future. So, please go on your USB work on i.mx28 with Sascha's suggestion, > thank you! Don't worry about it, this is being worked on. Can you continue reviewing these patches? Thank you ;-) > > > Best regards, > > Marek Vasut Best regards, Marek Vasut -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
