On Thu, Apr 26, 2012 at 02:23:53PM -0700, Sarah Sharp wrote:
> The upcoming Intel Lynx Point chipset includes an xHCI host controller
> that can have ports switched from the EHCI host controller, just like
> the Intel Panther Point xHCI host. The PCI config registers to do the
> port switching are in the exact same place, with the same semantics.
>
> Hooray for shipping patches for next-gen hardware before the current gen
> hardware is even available for purchase!
>
> This patch should be backported to stable kernels as old as 3.0,
> that contain commit 69e848c2090aebba5698a1620604c7dccb448684
> "Intel xhci: Support EHCI/xHCI port switching."
>
> Signed-off-by: Sarah Sharp <sarah.a.sharp@xxxxxxxxxxxxxxx>
> Cc: stable@xxxxxxxxxxxxxxx
> ---
> drivers/usb/host/pci-quirks.c | 18 +++++++++++++++++-
> 1 files changed, 17 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
> index 76c13cd..0c325dc 100644
> --- a/drivers/usb/host/pci-quirks.c
> +++ b/drivers/usb/host/pci-quirks.c
> @@ -712,12 +712,28 @@ static int handshake(void __iomem *ptr, u32 mask, u32 done,
> return -ETIMEDOUT;
> }
>
> -bool usb_is_intel_switchable_xhci(struct pci_dev *pdev)
> +#define PCI_DEVICE_ID_INTEL_LYNX_POINT_XHCI 0x8C31
> +
> +bool usb_is_intel_ppt_switchable_xhci(struct pci_dev *pdev)
> {
> return pdev->class == PCI_CLASS_SERIAL_USB_XHCI &&
> pdev->vendor == PCI_VENDOR_ID_INTEL &&
> pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI;
> }
> +
> +/* The Intel Lynx Point chipset also has switchable ports. */
> +bool usb_is_intel_lpt_switchable_xhci(struct pci_dev *pdev)
> +{
> + return pdev->class == PCI_CLASS_SERIAL_USB_XHCI &&
> + pdev->vendor == PCI_VENDOR_ID_INTEL &&
> + pdev->device == PCI_DEVICE_ID_INTEL_LYNX_POINT_XHCI;
> +}
> +
> +bool usb_is_intel_switchable_xhci(struct pci_dev *pdev)
> +{
> + return usb_is_intel_ppt_switchable_xhci(pdev) ||
> + usb_is_intel_lpt_switchable_xhci(pdev);
> +}
Is this list just going to grow and grow in the future with new
chipsets? Or can we just say "all Intel chips do this" and if something
in the future changes, we can handle it that way?
thanks,
greg k-h
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