> From: Felipe Balbi [mailto:balbi@xxxxxx] > Sent: Wednesday, April 11, 2012 6:44 AM > > This makes it far simpler to support host, > otg and device roles properly. It also prevents > a problem with dwc3 and host mode where we > were requesting the entire memory region thus > preventing xhci from ever ioremapping its own > address space. > > Cc: Paul Zimmerman <Paul.Zimmerman@xxxxxxxxxxxx> > Cc: Anton Tikhomirov <av.tikhomirov@xxxxxxxxxxx> > Signed-off-by: Felipe Balbi <balbi@xxxxxx> Hi Felipe, Adding Ido to the CC, he submitted a patch to add OTG support to the driver. Most of this patch seems to be concerned with splitting the global register space from the device register space. Can you explain how that helps with OTG and host mode? I don't see it. It seems like a lot of churn for no good reason. -- Paul > --- > > Guys, if you have some extra time, please test this patch > as it will help adding support for the OTG address space > later. > > I did some quick tests here and we seem to be accessing correct > addresses after the conversion but my FPGA seems to be misbehaving > for some reason. > > Here's my tracing output (I hacked dwc3_readl/dwc3_writel to print it): > > <...>-481 [000] .... 7.527445: dwc3_probe: dwc3_probe: resource host, start f3c00000, end > f3c07fff > <...>-481 [000] .... 7.527446: dwc3_probe: dwc3_probe: resource global, start f3c0c100, end > f3c0c6ff > <...>-481 [000] .... 7.527458: dwc3_probe: dwc3_probe: global ffffc90000c78100 > <...>-481 [000] .... 7.527458: dwc3_probe: dwc3_probe: resource device, start f3c0c700, end > f3c0cbff > <...>-481 [000] .... 7.527463: dwc3_probe: dwc3_probe: device ffffc90000c7c700 > <...>-481 [000] .... 7.527465: dwc3_readl: dwc3_readl: read base ffffc90000c78100 offset > 00000020 -> 5533183a > <...>-481 [000] .... 7.527467: dwc3_readl: dwc3_readl: read base ffffc90000c78100 offset > 00000010 -> 30c02000 > <...>-481 [000] .... 7.527467: dwc3_writel: dwc3_writel: write base ffffc90000c78100 offset > 00000010 -> 30c02800 > <...>-481 [000] .... 7.527469: dwc3_readl: dwc3_readl: read base ffffc90000c78100 offset > 000001c0 -> 00248002 > <...>-481 [000] .... 7.527469: dwc3_writel: dwc3_writel: write base ffffc90000c78100 offset > 000001c0 -> 80248002 > <...>-481 [000] .... 7.527471: dwc3_readl: dwc3_readl: read base ffffc90000c78100 offset > 00000100 -> 00002400 > <...>-481 [000] .... 7.527471: dwc3_writel: dwc3_writel: write base ffffc90000c78100 offset > 00000100 -> 80002400 > <...>-481 [000] .N.. 7.627274: dwc3_readl: dwc3_readl: read base ffffc90000c78100 offset > 000001c0 -> 80248002 > <...>-481 [000] .N.. 7.627274: dwc3_writel: dwc3_writel: write base ffffc90000c78100 offset > 000001c0 -> 00248002 > <...>-481 [000] .N.. 7.627276: dwc3_readl: dwc3_readl: read base ffffc90000c78100 offset > 00000100 -> 80002410 > <...>-481 [000] .N.. 7.627276: dwc3_writel: dwc3_writel: write base ffffc90000c78100 offset > 00000100 -> 00002410 > <...>-481 [000] .N.. 7.627278: dwc3_readl: dwc3_readl: read base ffffc90000c78100 offset > 00000010 -> 30c02800 > <...>-481 [000] .N.. 7.627278: dwc3_writel: dwc3_writel: write base ffffc90000c78100 offset > 00000010 -> 30c02000 > <...>-481 [000] .N.. 7.627279: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627280: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627281: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627283: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627284: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627285: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627287: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627288: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627289: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627291: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627292: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627293: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627295: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627296: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627297: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627299: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627300: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627301: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627303: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627304: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627305: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627307: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627308: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627309: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627311: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627312: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627313: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627315: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627316: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627317: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627319: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 40000000 > <...>-481 [000] .N.. 7.627320: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 00000000 > <...>-481 [000] .N.. 7.627321: dwc3_readl: dwc3_readl: read base ffffc90000c78100 offset > 00000040 -> 204080d8 > <...>-481 [000] .N.. 7.627323: dwc3_readl: dwc3_readl: read base ffffc90000c78100 offset > 00000044 -> 0160c93b > <...>-481 [000] .N.. 7.627324: dwc3_readl: dwc3_readl: read base ffffc90000c78100 offset > 00000048 -> 12345678 > <...>-481 [000] .N.. 7.627325: dwc3_readl: dwc3_readl: read base ffffc90000c78100 offset > 0000004c -> 04108089 > <...>-481 [000] .N.. 7.627327: dwc3_readl: dwc3_readl: read base ffffc90000c78100 offset > 00000050 -> 48820004 > <...>-481 [000] .N.. 7.627328: dwc3_readl: dwc3_readl: read base ffffc90000c78100 offset > 00000054 -> 04204108 > <...>-481 [000] .N.. 7.627329: dwc3_readl: dwc3_readl: read base ffffc90000c78100 offset > 00000058 -> 010400e0 > <...>-481 [000] .N.. 7.627331: dwc3_readl: dwc3_readl: read base ffffc90000c78100 offset > 0000005c -> 00c4026e > <...>-481 [000] .N.. 7.627332: dwc3_readl: dwc3_readl: read base ffffc90000c78100 offset > 00000500 -> 00000104 > <...>-481 [000] .N.. 7.627334: dwc3_readl: dwc3_readl: read base ffffc90000c78100 offset > 00000010 -> 30c02000 > <...>-481 [000] .N.. 7.627334: dwc3_writel: dwc3_writel: write base ffffc90000c78100 offset > 00000010 -> 30c12000 > <...>-481 [001] .... 7.627400: dwc3_writel: dwc3_writel: write base ffffc90000c78100 offset > 00000300 -> 3045d000 > <...>-481 [001] .... 7.627401: dwc3_writel: dwc3_writel: write base ffffc90000c78100 offset > 00000304 -> 00000000 > <...>-481 [001] .... 7.627402: dwc3_writel: dwc3_writel: write base ffffc90000c78100 offset > 00000308 -> 00001000 > <...>-481 [001] .... 7.627402: dwc3_writel: dwc3_writel: write base ffffc90000c78100 offset > 0000030c -> 00000000 > <...>-481 [001] .... 7.627404: dwc3_readl: dwc3_readl: read base ffffc90000c78100 offset > 00000010 -> 30c12000 > <...>-481 [001] .... 7.627404: dwc3_writel: dwc3_writel: write base ffffc90000c78100 offset > 00000010 -> 30c12000 > <...>-481 [001] .... 7.627459: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000008 -> 00001e1f > <...>-8481 [000] d... 181.392918: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000000 -> 00080804 > <...>-8481 [000] d... 181.392920: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000000 -> 00080804 > <...>-8481 [000] d... 181.392924: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000108 -> 00000000 > <...>-8481 [000] d... 181.392925: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000104 -> 00000000 > <...>-8481 [000] d... 181.392925: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000100 -> 00000000 > <...>-8481 [000] d... 181.392926: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 0000010c -> 00000409 > <...>-8481 [000] d... 181.392927: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 0000010c -> 00000009 > <...>-8481 [000] d... 181.392932: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000108 -> 00001000 > <...>-8481 [000] d... 181.392932: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000104 -> 00000500 > <...>-8481 [000] d... 181.392933: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000100 -> 00000000 > <...>-8481 [000] d... 181.392933: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 0000010c -> 00000401 > <...>-8481 [000] d... 181.392935: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 0000010c -> 00000001 > <...>-8481 [000] d... 181.392939: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000108 -> 00000001 > <...>-8481 [000] d... 181.392939: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000104 -> 00000000 > <...>-8481 [000] d... 181.392940: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000100 -> 00000000 > <...>-8481 [000] d... 181.392941: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 0000010c -> 00000402 > <...>-8481 [000] d... 181.392942: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 0000010c -> 00000402 > <...>-8481 [000] d... 181.392945: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 0000010c -> 00010002 > <...>-8481 [000] d... 181.392947: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000020 -> 00000000 > <...>-8481 [000] d... 181.392948: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000020 -> 00000001 > <...>-8481 [000] d... 181.392951: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000118 -> 00001000 > <...>-8481 [000] d... 181.392951: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000114 -> 02000500 > <...>-8481 [000] d... 181.392952: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000110 -> 00000000 > <...>-8481 [000] d... 181.392952: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 0000011c -> 00000401 > <...>-8481 [000] d... 181.392954: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 0000011c -> 00000001 > <...>-8481 [000] d... 181.392958: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000118 -> 00000001 > <...>-8481 [000] d... 181.392958: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000114 -> 00000000 > <...>-8481 [000] d... 181.392959: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000110 -> 00000000 > <...>-8481 [000] d... 181.392959: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 0000011c -> 00000402 > <...>-8481 [000] d... 181.392961: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 0000011c -> 00000402 > <...>-8481 [000] d... 181.392963: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 0000011c -> 00020002 > <...>-8481 [000] d... 181.392966: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000020 -> 00000001 > <...>-8481 [000] d... 181.392967: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000020 -> 00000003 > <...>-8481 [000] d... 181.392969: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000108 -> 00000000 > <...>-8481 [000] d... 181.392970: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000104 -> 3045f000 > <...>-8481 [000] d... 181.392971: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000100 -> 00000000 > <...>-8481 [000] d... 181.392971: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 0000010c -> 00000406 > <...>-8481 [000] d... 181.392973: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 0000010c -> 00000406 > <...>-8481 [000] d... 181.392975: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 0000010c -> 00000006 > <...>-8481 [000] d... 181.392978: dwc3_ep0_start_trans: dwc3_readl: read base ffffc90000c7c700 > offset 0000010c -> 00000006 > <...>-8481 [000] d... 181.392979: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 00000004 -> 00000000 > <...>-8481 [000] d... 181.392980: dwc3_writel: dwc3_writel: write base ffffc90000c7c700 offset > 00000004 -> 800a0000 > <...>-8481 [000] d... 181.392981: dwc3_readl: dwc3_readl: read base ffffc90000c7c700 offset > 0000000c -> 00933fdc > > drivers/usb/dwc3/core.c | 102 +++++++++++++++++++------------ > drivers/usb/dwc3/core.h | 132 ++++++++++++++++++++-------------------- > drivers/usb/dwc3/debugfs.c | 22 +++---- > drivers/usb/dwc3/dwc3-exynos.c | 30 ++++++++- > drivers/usb/dwc3/dwc3-omap.c | 40 +++++++++--- > drivers/usb/dwc3/dwc3-pci.c | 22 +++++-- > drivers/usb/dwc3/ep0.c | 4 +- > drivers/usb/dwc3/gadget.c | 94 ++++++++++++++-------------- > drivers/usb/dwc3/gadget.h | 2 +- > drivers/usb/dwc3/host.c | 2 +- > 10 files changed, 269 insertions(+), 181 deletions(-) > > diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c > index b7ba154..4e397f5 100644 > --- a/drivers/usb/dwc3/core.c > +++ b/drivers/usb/dwc3/core.c > @@ -107,10 +107,10 @@ void dwc3_set_mode(struct dwc3 *dwc, u32 mode) > { > u32 reg; > > - reg = dwc3_readl(dwc->regs, DWC3_GCTL); > + reg = dwc3_readl(dwc->global, DWC3_GCTL); > reg &= ~(DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG)); > reg |= DWC3_GCTL_PRTCAPDIR(mode); > - dwc3_writel(dwc->regs, DWC3_GCTL, reg); > + dwc3_writel(dwc->global, DWC3_GCTL, reg); > } > > /** > @@ -122,36 +122,36 @@ static void dwc3_core_soft_reset(struct dwc3 *dwc) > u32 reg; > > /* Before Resetting PHY, put Core in Reset */ > - reg = dwc3_readl(dwc->regs, DWC3_GCTL); > + reg = dwc3_readl(dwc->global, DWC3_GCTL); > reg |= DWC3_GCTL_CORESOFTRESET; > - dwc3_writel(dwc->regs, DWC3_GCTL, reg); > + dwc3_writel(dwc->global, DWC3_GCTL, reg); > > /* Assert USB3 PHY reset */ > - reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); > + reg = dwc3_readl(dwc->global, DWC3_GUSB3PIPECTL(0)); > reg |= DWC3_GUSB3PIPECTL_PHYSOFTRST; > - dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); > + dwc3_writel(dwc->global, DWC3_GUSB3PIPECTL(0), reg); > > /* Assert USB2 PHY reset */ > - reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); > + reg = dwc3_readl(dwc->global, DWC3_GUSB2PHYCFG(0)); > reg |= DWC3_GUSB2PHYCFG_PHYSOFTRST; > - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); > + dwc3_writel(dwc->global, DWC3_GUSB2PHYCFG(0), reg); > > mdelay(100); > > /* Clear USB3 PHY reset */ > - reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); > + reg = dwc3_readl(dwc->global, DWC3_GUSB3PIPECTL(0)); > reg &= ~DWC3_GUSB3PIPECTL_PHYSOFTRST; > - dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); > + dwc3_writel(dwc->global, DWC3_GUSB3PIPECTL(0), reg); > > /* Clear USB2 PHY reset */ > - reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); > + reg = dwc3_readl(dwc->global, DWC3_GUSB2PHYCFG(0)); > reg &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST; > - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); > + dwc3_writel(dwc->global, DWC3_GUSB2PHYCFG(0), reg); > > /* After PHYs are stable we can take Core out of reset state */ > - reg = dwc3_readl(dwc->regs, DWC3_GCTL); > + reg = dwc3_readl(dwc->global, DWC3_GCTL); > reg &= ~DWC3_GCTL_CORESOFTRESET; > - dwc3_writel(dwc->regs, DWC3_GCTL, reg); > + dwc3_writel(dwc->global, DWC3_GCTL, reg); > } > > /** > @@ -266,13 +266,13 @@ static int __devinit dwc3_event_buffers_setup(struct dwc3 *dwc) > evt->buf, (unsigned long long) evt->dma, > evt->length); > > - dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(n), > + dwc3_writel(dwc->global, DWC3_GEVNTADRLO(n), > lower_32_bits(evt->dma)); > - dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(n), > + dwc3_writel(dwc->global, DWC3_GEVNTADRHI(n), > upper_32_bits(evt->dma)); > - dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(n), > + dwc3_writel(dwc->global, DWC3_GEVNTSIZ(n), > evt->length & 0xffff); > - dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(n), 0); > + dwc3_writel(dwc->global, DWC3_GEVNTCOUNT(n), 0); > } > > return 0; > @@ -285,10 +285,10 @@ static void dwc3_event_buffers_cleanup(struct dwc3 *dwc) > > for (n = 0; n < dwc->num_event_buffers; n++) { > evt = dwc->ev_buffs[n]; > - dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(n), 0); > - dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(n), 0); > - dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(n), 0); > - dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(n), 0); > + dwc3_writel(dwc->global, DWC3_GEVNTADRLO(n), 0); > + dwc3_writel(dwc->global, DWC3_GEVNTADRHI(n), 0); > + dwc3_writel(dwc->global, DWC3_GEVNTSIZ(n), 0); > + dwc3_writel(dwc->global, DWC3_GEVNTCOUNT(n), 0); > } > } > > @@ -296,15 +296,15 @@ static void __devinit dwc3_cache_hwparams(struct dwc3 *dwc) > { > struct dwc3_hwparams *parms = &dwc->hwparams; > > - parms->hwparams0 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS0); > - parms->hwparams1 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS1); > - parms->hwparams2 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS2); > - parms->hwparams3 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS3); > - parms->hwparams4 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS4); > - parms->hwparams5 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS5); > - parms->hwparams6 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS6); > - parms->hwparams7 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS7); > - parms->hwparams8 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS8); > + parms->hwparams0 = dwc3_readl(dwc->global, DWC3_GHWPARAMS0); > + parms->hwparams1 = dwc3_readl(dwc->global, DWC3_GHWPARAMS1); > + parms->hwparams2 = dwc3_readl(dwc->global, DWC3_GHWPARAMS2); > + parms->hwparams3 = dwc3_readl(dwc->global, DWC3_GHWPARAMS3); > + parms->hwparams4 = dwc3_readl(dwc->global, DWC3_GHWPARAMS4); > + parms->hwparams5 = dwc3_readl(dwc->global, DWC3_GHWPARAMS5); > + parms->hwparams6 = dwc3_readl(dwc->global, DWC3_GHWPARAMS6); > + parms->hwparams7 = dwc3_readl(dwc->global, DWC3_GHWPARAMS7); > + parms->hwparams8 = dwc3_readl(dwc->global, DWC3_GHWPARAMS8); > } > > /** > @@ -319,7 +319,7 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc) > u32 reg; > int ret; > > - reg = dwc3_readl(dwc->regs, DWC3_GSNPSID); > + reg = dwc3_readl(dwc->global, DWC3_GSNPSID); > /* This should read as U3 followed by revision number */ > if ((reg & DWC3_GSNPSID_MASK) != 0x55330000) { > dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n"); > @@ -332,9 +332,9 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc) > > /* issue device SoftReset too */ > timeout = jiffies + msecs_to_jiffies(500); > - dwc3_writel(dwc->regs, DWC3_DCTL, DWC3_DCTL_CSFTRST); > + dwc3_writel(dwc->device, DWC3_DCTL, DWC3_DCTL_CSFTRST); > do { > - reg = dwc3_readl(dwc->regs, DWC3_DCTL); > + reg = dwc3_readl(dwc->device, DWC3_DCTL); > if (!(reg & DWC3_DCTL_CSFTRST)) > break; > > @@ -349,7 +349,7 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc) > > dwc3_cache_hwparams(dwc); > > - reg = dwc3_readl(dwc->regs, DWC3_GCTL); > + reg = dwc3_readl(dwc->global, DWC3_GCTL); > reg &= ~DWC3_GCTL_SCALEDOWN_MASK; > reg &= ~DWC3_GCTL_DISSCRAMBLE; > > @@ -370,7 +370,7 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc) > if (dwc->revision < DWC3_REVISION_190A) > reg |= DWC3_GCTL_U2RSTECN; > > - dwc3_writel(dwc->regs, DWC3_GCTL, reg); > + dwc3_writel(dwc->global, DWC3_GCTL, reg); > > ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE); > if (ret) { > @@ -430,9 +430,34 @@ static int __devinit dwc3_probe(struct platform_device *pdev) > dev_err(dev, "missing resource\n"); > return -ENODEV; > } > - > dwc->res = res; > > + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); > + if (!res) { > + dev_err(dev, "missing resource\n"); > + return -ENODEV; > + } > + > + res = devm_request_mem_region(dev, res->start, resource_size(res), > + dev_name(dev)); > + if (!res) { > + dev_err(dev, "can't request mem region\n"); > + return -ENOMEM; > + } > + > + regs = devm_ioremap(dev, res->start, resource_size(res)); > + if (!regs) { > + dev_err(dev, "ioremap failed\n"); > + return -ENOMEM; > + } > + dwc->global = regs; > + > + res = platform_get_resource(pdev, IORESOURCE_MEM, 2); > + if (!res) { > + dev_err(dev, "missing resource\n"); > + return -ENODEV; > + } > + > res = devm_request_mem_region(dev, res->start, resource_size(res), > dev_name(dev)); > if (!res) { > @@ -445,6 +470,7 @@ static int __devinit dwc3_probe(struct platform_device *pdev) > dev_err(dev, "ioremap failed\n"); > return -ENOMEM; > } > + dwc->device = regs; > > irq = platform_get_irq(pdev, 0); > if (irq < 0) { > @@ -455,8 +481,6 @@ static int __devinit dwc3_probe(struct platform_device *pdev) > spin_lock_init(&dwc->lock); > platform_set_drvdata(pdev, dwc); > > - dwc->regs = regs; > - dwc->regs_size = resource_size(res); > dwc->dev = dev; > dwc->irq = irq; > > diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h > index a32c2b5..bc0c476 100644 > --- a/drivers/usb/dwc3/core.h > +++ b/drivers/usb/dwc3/core.h > @@ -76,71 +76,71 @@ > #define DWC3_GSNPSREV_MASK 0xffff > > /* Global Registers */ > -#define DWC3_GSBUSCFG0 0xc100 > -#define DWC3_GSBUSCFG1 0xc104 > -#define DWC3_GTXTHRCFG 0xc108 > -#define DWC3_GRXTHRCFG 0xc10c > -#define DWC3_GCTL 0xc110 > -#define DWC3_GEVTEN 0xc114 > -#define DWC3_GSTS 0xc118 > -#define DWC3_GSNPSID 0xc120 > -#define DWC3_GGPIO 0xc124 > -#define DWC3_GUID 0xc128 > -#define DWC3_GUCTL 0xc12c > -#define DWC3_GBUSERRADDR0 0xc130 > -#define DWC3_GBUSERRADDR1 0xc134 > -#define DWC3_GPRTBIMAP0 0xc138 > -#define DWC3_GPRTBIMAP1 0xc13c > -#define DWC3_GHWPARAMS0 0xc140 > -#define DWC3_GHWPARAMS1 0xc144 > -#define DWC3_GHWPARAMS2 0xc148 > -#define DWC3_GHWPARAMS3 0xc14c > -#define DWC3_GHWPARAMS4 0xc150 > -#define DWC3_GHWPARAMS5 0xc154 > -#define DWC3_GHWPARAMS6 0xc158 > -#define DWC3_GHWPARAMS7 0xc15c > -#define DWC3_GDBGFIFOSPACE 0xc160 > -#define DWC3_GDBGLTSSM 0xc164 > -#define DWC3_GPRTBIMAP_HS0 0xc180 > -#define DWC3_GPRTBIMAP_HS1 0xc184 > -#define DWC3_GPRTBIMAP_FS0 0xc188 > -#define DWC3_GPRTBIMAP_FS1 0xc18c > - > -#define DWC3_GUSB2PHYCFG(n) (0xc200 + (n * 0x04)) > -#define DWC3_GUSB2I2CCTL(n) (0xc240 + (n * 0x04)) > - > -#define DWC3_GUSB2PHYACC(n) (0xc280 + (n * 0x04)) > - > -#define DWC3_GUSB3PIPECTL(n) (0xc2c0 + (n * 0x04)) > - > -#define DWC3_GTXFIFOSIZ(n) (0xc300 + (n * 0x04)) > -#define DWC3_GRXFIFOSIZ(n) (0xc380 + (n * 0x04)) > - > -#define DWC3_GEVNTADRLO(n) (0xc400 + (n * 0x10)) > -#define DWC3_GEVNTADRHI(n) (0xc404 + (n * 0x10)) > -#define DWC3_GEVNTSIZ(n) (0xc408 + (n * 0x10)) > -#define DWC3_GEVNTCOUNT(n) (0xc40c + (n * 0x10)) > - > -#define DWC3_GHWPARAMS8 0xc600 > +#define DWC3_GSBUSCFG0 0x0000 > +#define DWC3_GSBUSCFG1 0x0004 > +#define DWC3_GTXTHRCFG 0x0008 > +#define DWC3_GRXTHRCFG 0x000c > +#define DWC3_GCTL 0x0010 > +#define DWC3_GEVTEN 0x0014 > +#define DWC3_GSTS 0x0018 > +#define DWC3_GSNPSID 0x0020 > +#define DWC3_GGPIO 0x0024 > +#define DWC3_GUID 0x0028 > +#define DWC3_GUCTL 0x002c > +#define DWC3_GBUSERRADDR0 0x0030 > +#define DWC3_GBUSERRADDR1 0x0034 > +#define DWC3_GPRTBIMAP0 0x0038 > +#define DWC3_GPRTBIMAP1 0x003c > +#define DWC3_GHWPARAMS0 0x0040 > +#define DWC3_GHWPARAMS1 0x0044 > +#define DWC3_GHWPARAMS2 0x0048 > +#define DWC3_GHWPARAMS3 0x004c > +#define DWC3_GHWPARAMS4 0x0050 > +#define DWC3_GHWPARAMS5 0x0054 > +#define DWC3_GHWPARAMS6 0x0058 > +#define DWC3_GHWPARAMS7 0x005c > +#define DWC3_GDBGFIFOSPACE 0x0060 > +#define DWC3_GDBGLTSSM 0x0064 > +#define DWC3_GPRTBIMAP_HS0 0x0080 > +#define DWC3_GPRTBIMAP_HS1 0x0084 > +#define DWC3_GPRTBIMAP_FS0 0x0088 > +#define DWC3_GPRTBIMAP_FS1 0x008c > + > +#define DWC3_GUSB2PHYCFG(n) (0x0100 + (n * 0x04)) > +#define DWC3_GUSB2I2CCTL(n) (0x0140 + (n * 0x04)) > + > +#define DWC3_GUSB2PHYACC(n) (0x0180 + (n * 0x04)) > + > +#define DWC3_GUSB3PIPECTL(n) (0x01c0 + (n * 0x04)) > + > +#define DWC3_GTXFIFOSIZ(n) (0x0200 + (n * 0x04)) > +#define DWC3_GRXFIFOSIZ(n) (0x0280 + (n * 0x04)) > + > +#define DWC3_GEVNTADRLO(n) (0x0300 + (n * 0x10)) > +#define DWC3_GEVNTADRHI(n) (0x0304 + (n * 0x10)) > +#define DWC3_GEVNTSIZ(n) (0x0308 + (n * 0x10)) > +#define DWC3_GEVNTCOUNT(n) (0x030c + (n * 0x10)) > + > +#define DWC3_GHWPARAMS8 0x0500 > > /* Device Registers */ > -#define DWC3_DCFG 0xc700 > -#define DWC3_DCTL 0xc704 > -#define DWC3_DEVTEN 0xc708 > -#define DWC3_DSTS 0xc70c > -#define DWC3_DGCMDPAR 0xc710 > -#define DWC3_DGCMD 0xc714 > -#define DWC3_DALEPENA 0xc720 > -#define DWC3_DEPCMDPAR2(n) (0xc800 + (n * 0x10)) > -#define DWC3_DEPCMDPAR1(n) (0xc804 + (n * 0x10)) > -#define DWC3_DEPCMDPAR0(n) (0xc808 + (n * 0x10)) > -#define DWC3_DEPCMD(n) (0xc80c + (n * 0x10)) > +#define DWC3_DCFG 0x0000 > +#define DWC3_DCTL 0x0004 > +#define DWC3_DEVTEN 0x0008 > +#define DWC3_DSTS 0x000c > +#define DWC3_DGCMDPAR 0x0010 > +#define DWC3_DGCMD 0x0014 > +#define DWC3_DALEPENA 0x0020 > +#define DWC3_DEPCMDPAR2(n) (0x0100 + (n * 0x10)) > +#define DWC3_DEPCMDPAR1(n) (0x0104 + (n * 0x10)) > +#define DWC3_DEPCMDPAR0(n) (0x0108 + (n * 0x10)) > +#define DWC3_DEPCMD(n) (0x010c + (n * 0x10)) > > /* OTG Registers */ > -#define DWC3_OCFG 0xcc00 > -#define DWC3_OCTL 0xcc04 > -#define DWC3_OEVTEN 0xcc08 > -#define DWC3_OSTS 0xcc0C > +#define DWC3_OCFG 0x0000 > +#define DWC3_OCTL 0x0004 > +#define DWC3_OEVTEN 0x0008 > +#define DWC3_OSTS 0x000C > > /* Bit fields */ > > @@ -545,8 +545,9 @@ struct dwc3_request { > * @event_buffer_list: a list of event buffers > * @gadget: device side representation of the peripheral controller > * @gadget_driver: pointer to the gadget driver > - * @regs: base address for our registers > - * @regs_size: address space size > + * @global: global base address > + * @device: device base address > + * @host: host base address > * @irq: IRQ number > * @num_event_buffers: calculated number of event buffers > * @u1u2: only used on revisions <1.83a for workaround > @@ -591,8 +592,9 @@ struct dwc3 { > struct usb_gadget gadget; > struct usb_gadget_driver *gadget_driver; > > - void __iomem *regs; > - size_t regs_size; > + void __iomem *global; > + void __iomem *device; > + void __iomem *host; > > int irq; > > diff --git a/drivers/usb/dwc3/debugfs.c b/drivers/usb/dwc3/debugfs.c > index d4a30f1..7cf7d46 100644 > --- a/drivers/usb/dwc3/debugfs.c > +++ b/drivers/usb/dwc3/debugfs.c > @@ -59,7 +59,7 @@ > .offset = DWC3_ ##nm, \ > } > > -static const struct debugfs_reg32 dwc3_regs[] = { > +static const struct debugfs_reg32 dwc3_global_regs[] = { > dump_register(GSBUSCFG0), > dump_register(GSBUSCFG1), > dump_register(GTXTHRCFG), > @@ -230,6 +230,9 @@ static const struct debugfs_reg32 dwc3_regs[] = { > dump_register(GEVNTCOUNT(0)), > > dump_register(GHWPARAMS8), > +}; > + > +static const struct debugfs_reg32 dwc3_device_regs[] = { > dump_register(DCFG), > dump_register(DCTL), > dump_register(DEVTEN), > @@ -369,11 +372,6 @@ static const struct debugfs_reg32 dwc3_regs[] = { > dump_register(DEPCMD(29)), > dump_register(DEPCMD(30)), > dump_register(DEPCMD(31)), > - > - dump_register(OCFG), > - dump_register(OCTL), > - dump_register(OEVTEN), > - dump_register(OSTS), > }; > > static int dwc3_regdump_show(struct seq_file *s, void *unused) > @@ -381,8 +379,10 @@ static int dwc3_regdump_show(struct seq_file *s, void *unused) > struct dwc3 *dwc = s->private; > > seq_printf(s, "DesignWare USB3 Core Register Dump\n"); > - debugfs_print_regs32(s, dwc3_regs, ARRAY_SIZE(dwc3_regs), > - dwc->regs, ""); > + debugfs_print_regs32(s, dwc3_global_regs, ARRAY_SIZE(dwc3_global_regs), > + dwc->global, ""); > + debugfs_print_regs32(s, dwc3_device_regs, ARRAY_SIZE(dwc3_device_regs), > + dwc->device, ""); > return 0; > } > > @@ -404,7 +404,7 @@ static int dwc3_mode_show(struct seq_file *s, void *unused) > u32 reg; > > spin_lock_irqsave(&dwc->lock, flags); > - reg = dwc3_readl(dwc->regs, DWC3_GCTL); > + reg = dwc3_readl(dwc->global, DWC3_GCTL); > spin_unlock_irqrestore(&dwc->lock, flags); > > switch (DWC3_GCTL_PRTCAP(reg)) { > @@ -473,7 +473,7 @@ static int dwc3_testmode_show(struct seq_file *s, void *unused) > u32 reg; > > spin_lock_irqsave(&dwc->lock, flags); > - reg = dwc3_readl(dwc->regs, DWC3_DCTL); > + reg = dwc3_readl(dwc->device, DWC3_DCTL); > reg &= DWC3_DCTL_TSTCTRL_MASK; > reg >>= 1; > spin_unlock_irqrestore(&dwc->lock, flags); > @@ -557,7 +557,7 @@ static int dwc3_link_state_show(struct seq_file *s, void *unused) > u32 reg; > > spin_lock_irqsave(&dwc->lock, flags); > - reg = dwc3_readl(dwc->regs, DWC3_DSTS); > + reg = dwc3_readl(dwc->device, DWC3_DSTS); > state = DWC3_DSTS_USBLNKST(reg); > spin_unlock_irqrestore(&dwc->lock, flags); > > diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c > index d190301..53a54e2 100644 > --- a/drivers/usb/dwc3/dwc3-exynos.c > +++ b/drivers/usb/dwc3/dwc3-exynos.c > @@ -34,6 +34,8 @@ static int __devinit dwc3_exynos_probe(struct platform_device *pdev) > { > struct dwc3_exynos_data *pdata = pdev->dev.platform_data; > struct platform_device *dwc3; > + struct resource *resource; > + struct resource res[4]; > struct dwc3_exynos *exynos; > struct clk *clk; > > @@ -84,8 +86,32 @@ static int __devinit dwc3_exynos_probe(struct platform_device *pdev) > pdata->phy_init(pdev, pdata->phy_type); > } > > - ret = platform_device_add_resources(dwc3, pdev->resource, > - pdev->num_resources); > + resource = platform_get_resource(pdev, IORESOURCE_MEM, 0); > + if (!resource) { > + dev_err(&pdev->dev, "missing resource\n"); > + goto err2; > + } > + > + res[0].start = resource->start; > + res[0].end = resource->start + 0x7fff; > + res[0].name = "host"; > + res[0].flags = IORESOURCE_MEM; > + > + res[1].start = resource->start + 0xc100; > + res[1].end = resource->start + 0xc6ff; > + res[1].name = "global"; > + res[1].flags = IORESOURCE_MEM; > + > + res[2].start = resource->start + 0xc700; > + res[2].end = resource->start + 0xcbff; > + res[2].name = "device"; > + res[2].flags = IORESOURCE_MEM; > + > + res[3].start = platform_get_irq(pdev, 0); > + res[3].name = "dwc_usb3"; > + res[3].flags = IORESOURCE_IRQ; > + > + ret = platform_device_add_resources(dwc3, res, ARRAY_SIZE(res)); > if (ret) { > dev_err(&pdev->dev, "couldn't add resources to dwc3 device\n"); > goto err4; > diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c > index 0bca0d8..4345b6f 100644 > --- a/drivers/usb/dwc3/dwc3-omap.c > +++ b/drivers/usb/dwc3/dwc3-omap.c > @@ -201,7 +201,8 @@ static int __devinit dwc3_omap_probe(struct platform_device *pdev) > > struct platform_device *dwc3; > struct dwc3_omap *omap; > - struct resource *res; > + struct resource *resource; > + struct resource res[4]; > struct device *dev = &pdev->dev; > > int devid; > @@ -229,13 +230,14 @@ static int __devinit dwc3_omap_probe(struct platform_device *pdev) > return -EINVAL; > } > > - res = platform_get_resource(pdev, IORESOURCE_MEM, 1); > - if (!res) { > + resource = platform_get_resource(pdev, IORESOURCE_MEM, 1); > + if (!resource) { > dev_err(dev, "missing memory base resource\n"); > return -EINVAL; > } > > - base = devm_ioremap_nocache(dev, res->start, resource_size(res)); > + base = devm_ioremap_nocache(dev, resource->start, > + resource_size(resource)); > if (!base) { > dev_err(dev, "ioremap failed\n"); > return -ENOMEM; > @@ -251,7 +253,7 @@ static int __devinit dwc3_omap_probe(struct platform_device *pdev) > goto err1; > } > > - context = devm_kzalloc(dev, resource_size(res), GFP_KERNEL); > + context = devm_kzalloc(dev, resource_size(resource), GFP_KERNEL); > if (!context) { > dev_err(dev, "couldn't allocate dwc3 context memory\n"); > goto err2; > @@ -332,8 +334,32 @@ static int __devinit dwc3_omap_probe(struct platform_device *pdev) > > dwc3_writel(omap->base, USBOTGSS_IRQENABLE_SET_1, reg); > > - ret = platform_device_add_resources(dwc3, pdev->resource, > - pdev->num_resources); > + resource = platform_get_resource(pdev, IORESOURCE_MEM, 0); > + if (!resource) { > + dev_err(dev, "missing resource\n"); > + goto err2; > + } > + > + res[0].start = resource->start; > + res[0].end = resource->start + 0x7fff; > + res[0].name = "host"; > + res[0].flags = IORESOURCE_MEM; > + > + res[1].start = resource->start + 0xc100; > + res[1].end = resource->start + 0xc6ff; > + res[1].name = "global"; > + res[1].flags = IORESOURCE_MEM; > + > + res[2].start = resource->start + 0xc700; > + res[2].end = resource->start + 0xcbff; > + res[2].name = "device"; > + res[2].flags = IORESOURCE_MEM; > + > + res[3].start = platform_get_irq(pdev, 0); > + res[3].name = "dwc_usb3"; > + res[3].flags = IORESOURCE_IRQ; > + > + ret = platform_device_add_resources(dwc3, res, ARRAY_SIZE(res)); > if (ret) { > dev_err(dev, "couldn't add resources to dwc3 device\n"); > goto err2; > diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c > index a9ca9ad..e47a7c4 100644 > --- a/drivers/usb/dwc3/dwc3-pci.c > +++ b/drivers/usb/dwc3/dwc3-pci.c > @@ -56,7 +56,7 @@ struct dwc3_pci { > static int __devinit dwc3_pci_probe(struct pci_dev *pci, > const struct pci_device_id *id) > { > - struct resource res[2]; > + struct resource res[4]; > struct platform_device *dwc3; > struct dwc3_pci *glue; > int ret = -ENOMEM; > @@ -96,13 +96,23 @@ static int __devinit dwc3_pci_probe(struct pci_dev *pci, > memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res)); > > res[0].start = pci_resource_start(pci, 0); > - res[0].end = pci_resource_end(pci, 0); > - res[0].name = "dwc_usb3"; > + res[0].end = pci_resource_start(pci, 0) + 0x7fff; > + res[0].name = "host"; > res[0].flags = IORESOURCE_MEM; > > - res[1].start = pci->irq; > - res[1].name = "dwc_usb3"; > - res[1].flags = IORESOURCE_IRQ; > + res[1].start = pci_resource_start(pci, 0) + 0xc100; > + res[1].end = pci_resource_start(pci, 0) + 0xc6ff; > + res[1].name = "global"; > + res[1].flags = IORESOURCE_MEM; > + > + res[2].start = pci_resource_start(pci, 0) + 0xc700; > + res[2].end = pci_resource_start(pci, 0) + 0xcbff; > + res[2].name = "device"; > + res[2].flags = IORESOURCE_MEM; > + > + res[3].start = pci->irq; > + res[3].name = "dwc_usb3"; > + res[3].flags = IORESOURCE_IRQ; > > ret = platform_device_add_resources(dwc3, res, ARRAY_SIZE(res)); > if (ret) { > diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c > index 25910e2..f495c47 100644 > --- a/drivers/usb/dwc3/ep0.c > +++ b/drivers/usb/dwc3/ep0.c > @@ -409,10 +409,10 @@ static int dwc3_ep0_set_address(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) > return -EINVAL; > } > > - reg = dwc3_readl(dwc->regs, DWC3_DCFG); > + reg = dwc3_readl(dwc->device, DWC3_DCFG); > reg &= ~(DWC3_DCFG_DEVADDR_MASK); > reg |= DWC3_DCFG_DEVADDR(addr); > - dwc3_writel(dwc->regs, DWC3_DCFG, reg); > + dwc3_writel(dwc->device, DWC3_DCFG, reg); > > if (addr) > dwc->dev_state = DWC3_ADDRESS_STATE; > diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c > index dda56b8..db46baf 100644 > --- a/drivers/usb/dwc3/gadget.c > +++ b/drivers/usb/dwc3/gadget.c > @@ -67,7 +67,7 @@ int dwc3_gadget_set_test_mode(struct dwc3 *dwc, int mode) > { > u32 reg; > > - reg = dwc3_readl(dwc->regs, DWC3_DCTL); > + reg = dwc3_readl(dwc->device, DWC3_DCTL); > reg &= ~DWC3_DCTL_TSTCTRL_MASK; > > switch (mode) { > @@ -82,7 +82,7 @@ int dwc3_gadget_set_test_mode(struct dwc3 *dwc, int mode) > return -EINVAL; > } > > - dwc3_writel(dwc->regs, DWC3_DCTL, reg); > + dwc3_writel(dwc->device, DWC3_DCTL, reg); > > return 0; > } > @@ -100,16 +100,16 @@ int dwc3_gadget_set_link_state(struct dwc3 *dwc, enum dwc3_link_state state) > int retries = 10000; > u32 reg; > > - reg = dwc3_readl(dwc->regs, DWC3_DCTL); > + reg = dwc3_readl(dwc->device, DWC3_DCTL); > reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK; > > /* set requested state */ > reg |= DWC3_DCTL_ULSTCHNGREQ(state); > - dwc3_writel(dwc->regs, DWC3_DCTL, reg); > + dwc3_writel(dwc->device, DWC3_DCTL, reg); > > /* wait for a change in DSTS */ > while (--retries) { > - reg = dwc3_readl(dwc->regs, DWC3_DSTS); > + reg = dwc3_readl(dwc->device, DWC3_DSTS); > > if (DWC3_DSTS_USBLNKST(reg) == state) > return 0; > @@ -203,7 +203,7 @@ int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc) > dev_vdbg(dwc->dev, "%s: Fifo Addr %04x Size %d\n", > dep->name, last_fifo_depth, fifo_size & 0xffff); > > - dwc3_writel(dwc->regs, DWC3_GTXFIFOSIZ(fifo_number), > + dwc3_writel(dwc->device, DWC3_GTXFIFOSIZ(fifo_number), > fifo_size); > > last_fifo_depth += (fifo_size & 0xffff); > @@ -288,13 +288,13 @@ int dwc3_send_gadget_ep_cmd(struct dwc3 *dwc, unsigned ep, > dwc3_gadget_ep_cmd_string(cmd), params->param0, > params->param1, params->param2); > > - dwc3_writel(dwc->regs, DWC3_DEPCMDPAR0(ep), params->param0); > - dwc3_writel(dwc->regs, DWC3_DEPCMDPAR1(ep), params->param1); > - dwc3_writel(dwc->regs, DWC3_DEPCMDPAR2(ep), params->param2); > + dwc3_writel(dwc->device, DWC3_DEPCMDPAR0(ep), params->param0); > + dwc3_writel(dwc->device, DWC3_DEPCMDPAR1(ep), params->param1); > + dwc3_writel(dwc->device, DWC3_DEPCMDPAR2(ep), params->param2); > > - dwc3_writel(dwc->regs, DWC3_DEPCMD(ep), cmd | DWC3_DEPCMD_CMDACT); > + dwc3_writel(dwc->device, DWC3_DEPCMD(ep), cmd | DWC3_DEPCMD_CMDACT); > do { > - reg = dwc3_readl(dwc->regs, DWC3_DEPCMD(ep)); > + reg = dwc3_readl(dwc->device, DWC3_DEPCMD(ep)); > if (!(reg & DWC3_DEPCMD_CMDACT)) { > dev_vdbg(dwc->dev, "Command Complete --> %d\n", > DWC3_DEPCMD_STATUS(reg)); > @@ -475,9 +475,9 @@ static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep, > dep->type = usb_endpoint_type(desc); > dep->flags |= DWC3_EP_ENABLED; > > - reg = dwc3_readl(dwc->regs, DWC3_DALEPENA); > + reg = dwc3_readl(dwc->device, DWC3_DALEPENA); > reg |= DWC3_DALEPENA_EP(dep->number); > - dwc3_writel(dwc->regs, DWC3_DALEPENA, reg); > + dwc3_writel(dwc->device, DWC3_DALEPENA, reg); > > if (!usb_endpoint_xfer_isoc(desc)) > return 0; > @@ -528,9 +528,9 @@ static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep) > > dwc3_remove_requests(dwc, dep); > > - reg = dwc3_readl(dwc->regs, DWC3_DALEPENA); > + reg = dwc3_readl(dwc->device, DWC3_DALEPENA); > reg &= ~DWC3_DALEPENA_EP(dep->number); > - dwc3_writel(dwc->regs, DWC3_DALEPENA, reg); > + dwc3_writel(dwc->device, DWC3_DALEPENA, reg); > > dep->stream_capable = false; > dep->desc = NULL; > @@ -1188,7 +1188,7 @@ static int dwc3_gadget_get_frame(struct usb_gadget *g) > struct dwc3 *dwc = gadget_to_dwc(g); > u32 reg; > > - reg = dwc3_readl(dwc->regs, DWC3_DSTS); > + reg = dwc3_readl(dwc->device, DWC3_DSTS); > return DWC3_DSTS_SOFFN(reg); > } > > @@ -1214,7 +1214,7 @@ static int dwc3_gadget_wakeup(struct usb_gadget *g) > * > * We can check that via USB Link State bits in DSTS register. > */ > - reg = dwc3_readl(dwc->regs, DWC3_DSTS); > + reg = dwc3_readl(dwc->device, DWC3_DSTS); > > speed = reg & DWC3_DSTS_CONNECTSPD; > if (speed == DWC3_DSTS_SUPERSPEED) { > @@ -1244,13 +1244,13 @@ static int dwc3_gadget_wakeup(struct usb_gadget *g) > > /* write zeroes to Link Change Request */ > reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK; > - dwc3_writel(dwc->regs, DWC3_DCTL, reg); > + dwc3_writel(dwc->device, DWC3_DCTL, reg); > > /* poll until Link State changes to ON */ > timeout = jiffies + msecs_to_jiffies(100); > > while (!time_after(jiffies, timeout)) { > - reg = dwc3_readl(dwc->regs, DWC3_DSTS); > + reg = dwc3_readl(dwc->device, DWC3_DSTS); > > /* in HS, means ON */ > if (DWC3_DSTS_USBLNKST(reg) == DWC3_LINK_STATE_U0) > @@ -1286,7 +1286,7 @@ static void dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on) > u32 reg; > u32 timeout = 500; > > - reg = dwc3_readl(dwc->regs, DWC3_DCTL); > + reg = dwc3_readl(dwc->device, DWC3_DCTL); > if (is_on) { > reg &= ~DWC3_DCTL_TRGTULST_MASK; > reg |= (DWC3_DCTL_RUN_STOP > @@ -1295,10 +1295,10 @@ static void dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on) > reg &= ~DWC3_DCTL_RUN_STOP; > } > > - dwc3_writel(dwc->regs, DWC3_DCTL, reg); > + dwc3_writel(dwc->device, DWC3_DCTL, reg); > > do { > - reg = dwc3_readl(dwc->regs, DWC3_DSTS); > + reg = dwc3_readl(dwc->device, DWC3_DSTS); > if (is_on) { > if (!(reg & DWC3_DSTS_DEVCTRLHLT)) > break; > @@ -1354,7 +1354,7 @@ static int dwc3_gadget_start(struct usb_gadget *g, > dwc->gadget_driver = driver; > dwc->gadget.dev.driver = &driver->driver; > > - reg = dwc3_readl(dwc->regs, DWC3_DCFG); > + reg = dwc3_readl(dwc->device, DWC3_DCFG); > reg &= ~(DWC3_DCFG_SPEED_MASK); > > /** > @@ -1374,7 +1374,7 @@ static int dwc3_gadget_start(struct usb_gadget *g, > reg |= DWC3_DCFG_SUPERSPEED; > else > reg |= dwc->maximum_speed; > - dwc3_writel(dwc->regs, DWC3_DCFG, reg); > + dwc3_writel(dwc->device, DWC3_DCFG, reg); > > dwc->start_config_issued = false; > > @@ -1611,9 +1611,9 @@ static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc, > return; > } > > - reg = dwc3_readl(dwc->regs, DWC3_DCTL); > + reg = dwc3_readl(dwc->device, DWC3_DCTL); > reg |= dwc->u1u2; > - dwc3_writel(dwc->regs, DWC3_DCTL, reg); > + dwc3_writel(dwc->device, DWC3_DCTL, reg); > > dwc->u1u2 = 0; > } > @@ -1840,12 +1840,12 @@ static void dwc3_gadget_disconnect_interrupt(struct dwc3 *dwc) > U1/U2 is powersave optimization. Skip it for now. Anyway we need to > enable it before we can disable it. > > - reg = dwc3_readl(dwc->regs, DWC3_DCTL); > + reg = dwc3_readl(dwc->device, DWC3_DCTL); > reg &= ~DWC3_DCTL_INITU1ENA; > - dwc3_writel(dwc->regs, DWC3_DCTL, reg); > + dwc3_writel(dwc->device, DWC3_DCTL, reg); > > reg &= ~DWC3_DCTL_INITU2ENA; > - dwc3_writel(dwc->regs, DWC3_DCTL, reg); > + dwc3_writel(dwc->device, DWC3_DCTL, reg); > #endif > > dwc3_stop_active_transfers(dwc); > @@ -1860,28 +1860,28 @@ static void dwc3_gadget_usb3_phy_power(struct dwc3 *dwc, int on) > { > u32 reg; > > - reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); > + reg = dwc3_readl(dwc->device, DWC3_GUSB3PIPECTL(0)); > > if (on) > reg &= ~DWC3_GUSB3PIPECTL_SUSPHY; > else > reg |= DWC3_GUSB3PIPECTL_SUSPHY; > > - dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); > + dwc3_writel(dwc->device, DWC3_GUSB3PIPECTL(0), reg); > } > > static void dwc3_gadget_usb2_phy_power(struct dwc3 *dwc, int on) > { > u32 reg; > > - reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); > + reg = dwc3_readl(dwc->device, DWC3_GUSB2PHYCFG(0)); > > if (on) > reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; > else > reg |= DWC3_GUSB2PHYCFG_SUSPHY; > > - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); > + dwc3_writel(dwc->device, DWC3_GUSB2PHYCFG(0), reg); > } > > static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc) > @@ -1931,9 +1931,9 @@ static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc) > if (dwc->gadget.speed != USB_SPEED_UNKNOWN) > dwc3_disconnect_gadget(dwc); > > - reg = dwc3_readl(dwc->regs, DWC3_DCTL); > + reg = dwc3_readl(dwc->device, DWC3_DCTL); > reg &= ~DWC3_DCTL_TSTCTRL_MASK; > - dwc3_writel(dwc->regs, DWC3_DCTL, reg); > + dwc3_writel(dwc->device, DWC3_DCTL, reg); > dwc->test_mode = false; > > dwc3_stop_active_transfers(dwc); > @@ -1941,9 +1941,9 @@ static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc) > dwc->start_config_issued = false; > > /* Reset device address to zero */ > - reg = dwc3_readl(dwc->regs, DWC3_DCFG); > + reg = dwc3_readl(dwc->device, DWC3_DCFG); > reg &= ~(DWC3_DCFG_DEVADDR_MASK); > - dwc3_writel(dwc->regs, DWC3_DCFG, reg); > + dwc3_writel(dwc->device, DWC3_DCFG, reg); > } > > static void dwc3_update_ram_clk_sel(struct dwc3 *dwc, u32 speed) > @@ -1966,9 +1966,9 @@ static void dwc3_update_ram_clk_sel(struct dwc3 *dwc, u32 speed) > if (!usb30_clock) > return; > > - reg = dwc3_readl(dwc->regs, DWC3_GCTL); > + reg = dwc3_readl(dwc->device, DWC3_GCTL); > reg |= DWC3_GCTL_RAMCLKSEL(usb30_clock); > - dwc3_writel(dwc->regs, DWC3_GCTL, reg); > + dwc3_writel(dwc->device, DWC3_GCTL, reg); > } > > static void dwc3_gadget_disable_phy(struct dwc3 *dwc, u8 speed) > @@ -1997,7 +1997,7 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc) > > memset(¶ms, 0x00, sizeof(params)); > > - reg = dwc3_readl(dwc->regs, DWC3_DSTS); > + reg = dwc3_readl(dwc->device, DWC3_DSTS); > speed = reg & DWC3_DSTS_CONNECTSPD; > dwc->speed = speed; > > @@ -2112,7 +2112,7 @@ static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc, > switch (dwc->link_state) { > case DWC3_LINK_STATE_U1: > case DWC3_LINK_STATE_U2: > - reg = dwc3_readl(dwc->regs, DWC3_DCTL); > + reg = dwc3_readl(dwc->device, DWC3_DCTL); > u1u2 = reg & (DWC3_DCTL_INITU2ENA > | DWC3_DCTL_ACCEPTU2ENA > | DWC3_DCTL_INITU1ENA > @@ -2123,7 +2123,7 @@ static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc, > > reg &= ~u1u2; > > - dwc3_writel(dwc->regs, DWC3_DCTL, reg); > + dwc3_writel(dwc->device, DWC3_DCTL, reg); > break; > default: > /* do nothing */ > @@ -2201,7 +2201,7 @@ static irqreturn_t dwc3_process_event_buf(struct dwc3 *dwc, u32 buf) > int left; > u32 count; > > - count = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(buf)); > + count = dwc3_readl(dwc->device, DWC3_GEVNTCOUNT(buf)); > count &= DWC3_GEVNTCOUNT_MASK; > if (!count) > return IRQ_NONE; > @@ -2225,7 +2225,7 @@ static irqreturn_t dwc3_process_event_buf(struct dwc3 *dwc, u32 buf) > evt->lpos = (evt->lpos + 4) % DWC3_EVENT_BUFFERS_SIZE; > left -= 4; > > - dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(buf), 4); > + dwc3_writel(dwc->device, DWC3_GEVNTCOUNT(buf), 4); > } > > return IRQ_HANDLED; > @@ -2340,7 +2340,7 @@ int __devinit dwc3_gadget_init(struct dwc3 *dwc) > DWC3_DEVTEN_CONNECTDONEEN | > DWC3_DEVTEN_USBRSTEN | > DWC3_DEVTEN_DISCONNEVTEN); > - dwc3_writel(dwc->regs, DWC3_DEVTEN, reg); > + dwc3_writel(dwc->device, DWC3_DEVTEN, reg); > > ret = device_register(&dwc->gadget.dev); > if (ret) { > @@ -2361,7 +2361,7 @@ err7: > device_unregister(&dwc->gadget.dev); > > err6: > - dwc3_writel(dwc->regs, DWC3_DEVTEN, 0x00); > + dwc3_writel(dwc->device, DWC3_DEVTEN, 0x00); > free_irq(irq, dwc); > > err5: > @@ -2393,7 +2393,7 @@ void dwc3_gadget_exit(struct dwc3 *dwc) > usb_del_gadget_udc(&dwc->gadget); > irq = platform_get_irq(to_platform_device(dwc->dev), 0); > > - dwc3_writel(dwc->regs, DWC3_DEVTEN, 0x00); > + dwc3_writel(dwc->device, DWC3_DEVTEN, 0x00); > free_irq(irq, dwc); > > dwc3_gadget_free_endpoints(dwc); > diff --git a/drivers/usb/dwc3/gadget.h b/drivers/usb/dwc3/gadget.h > index a860008..9a55a49 100644 > --- a/drivers/usb/dwc3/gadget.h > +++ b/drivers/usb/dwc3/gadget.h > @@ -123,7 +123,7 @@ static inline u32 dwc3_gadget_ep_get_transfer_index(struct dwc3 *dwc, u8 number) > { > u32 res_id; > > - res_id = dwc3_readl(dwc->regs, DWC3_DEPCMD(number)); > + res_id = dwc3_readl(dwc->device, DWC3_DEPCMD(number)); > > return DWC3_DEPCMD_GET_RSC_IDX(res_id); > } > diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c > index b108d18..fd03c3e 100644 > --- a/drivers/usb/dwc3/host.c > +++ b/drivers/usb/dwc3/host.c > @@ -72,7 +72,7 @@ int dwc3_host_init(struct dwc3 *dwc) > generic_resources[0].start = dwc->irq; > > generic_resources[1].start = dwc->res->start; > - generic_resources[1].end = dwc->res->start + 0x7fff; > + generic_resources[1].end = dwc->res->end; > > ret = platform_device_add_resources(xhci, generic_resources, > ARRAY_SIZE(generic_resources)); > -- > 1.7.9.2 -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
