On 03/14/2012 07:49 AM, Gupta, Ajay Kumar wrote:
I *think* that the DMA engine is performing some access on its own to
those registers behind the bridge which leads to the same read& clear
interrupt race.
DMA driver (CPPI4.1) is not yet available for AM35x but DMA might read
Mentor core registers. The solution is to disable non-PDR interrupt in
CONTROL register (bit D3) at offset 0x0004.
"D3 | uint | USB non-PDR interrupt enable"
I see. Care to send a patch to replace my "force DMA off"?
Ajay
Sebastian
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