ADV 1.1.20 for AM35 describes a bug in the IPS bridge which leads to a 32bit access by the bridge if the CPU performs an 8bit or 16bit read access. Write access is not affected. In general this is not a problem unless we have self-clearing bits like the interrupt status register. I have here a network gadget related testcase where it happens now and then that the musb sied hangs because it lost RX interrupts. Accordin to the ADV the driver is not affected because it does not perform such a read access but the reality seems different. After applying the patches 1-3 the race becomes way harder to trigger but it still triggers. After additionally disabling the DMA (running in PIO only mode) the bug did not trigger again. The bug still triggers with patches 1-4 remove and DMA disabled. I *think* that the DMA engine is performing some access on its own to those registers behind the bridge which leads to the same read & clear interrupt race. I don't see any other access to the register in question done by the CPU so I have nothing but to blame the DMA engine. Sebastian -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
