Re: [PATCH][v2]fsl/usb:Add controller version based ULPI and UTMI phy support

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On Mon, Jan 30, 2012 at 12:36:12PM +0530, Ramneek Mehresh wrote:
> Add support for ULPI and UTMI PHYs based on usb controller version info
> read from device-tree
> 
> Example of USB Controller versioning info:
> Version 1.2 and below : MPC8536, MPC8315, etc
> Version 1.6 : P1020, P1010, P2020, etc
> Version 2.2 : PSC9131, PSC9132, P3060, etc
> 
> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@xxxxxxxxxxxxx>
> ---
> Changes for v2:
> 	- Incorporated Greg's comment
> 		- moved fsl_usb.h from drivers/usb/misc
> 		  to drivers/usb/host/fsl/
> 
>  drivers/usb/gadget/fsl_udc_core.c |   25 ++++++++++++++-
>  drivers/usb/gadget/fsl_usb2_udc.h |   13 ++++++++
>  drivers/usb/host/ehci-fsl.c       |   35 +++++++++++++++++----
>  drivers/usb/host/ehci-fsl.h       |   15 ++++++++-
>  drivers/usb/host/fsl/fsl_usb.h    |   61 +++++++++++++++++++++++++++++++++++++
>  5 files changed, 141 insertions(+), 8 deletions(-)
>  create mode 100644 drivers/usb/host/fsl/fsl_usb.h
> 
> diff --git a/drivers/usb/gadget/fsl_udc_core.c b/drivers/usb/gadget/fsl_udc_core.c
> index d7ea6c0..3c28887 100644
> --- a/drivers/usb/gadget/fsl_udc_core.c
> +++ b/drivers/usb/gadget/fsl_udc_core.c
Hi ramneek, Freescale i.MX SoCs also use fsl_udc_core.c for device function.
Can you change the patch and let your added code can be not called by i.mx SoC?
Host is ok, as it uses ehci-mxc.c.

> @@ -1,5 +1,5 @@
>  /*
> - * Copyright (C) 2004-2007,2011 Freescale Semiconductor, Inc.
> + * Copyright (C) 2004-2007,2011-2012 Freescale Semiconductor, Inc.
>   * All rights reserved.
>   *
>   * Author: Li Yang <leoli@xxxxxxxxxxxxx>
> @@ -48,6 +48,7 @@
>  #include <asm/dma.h>
>  
>  #include "fsl_usb2_udc.h"
> +#include "../host/fsl/fsl_usb.h"
>  
>  #define	DRIVER_DESC	"Freescale High-Speed USB SOC Device Controller driver"
>  #define	DRIVER_AUTHOR	"Li Yang/Jiang Bo"
> @@ -245,23 +246,45 @@ static int dr_controller_setup(struct fsl_udc *udc)
>  {
>  	unsigned int tmp, portctrl, ep_num;
>  	unsigned int max_no_of_ep;
> +	int contr_ver = usb_get_ver_info();
>  #ifndef CONFIG_ARCH_MXC
>  	unsigned int ctrl;
>  #endif
>  	unsigned long timeout;
>  #define FSL_UDC_RESET_TIMEOUT 1000
>  
> +	if (contr_ver < 0) {
> +		printk(KERN_WARNING"fsl_usb: Could not get controller"
> +			"version\n");
> +		return -ENODEV;
> +	}
> +
>  	/* Config PHY interface */
>  	portctrl = fsl_readl(&dr_regs->portsc1);
>  	portctrl &= ~(PORTSCX_PHY_TYPE_SEL | PORTSCX_PORT_WIDTH);
>  	switch (udc->phy_mode) {
>  	case FSL_USB2_PHY_ULPI:
> +		if (contr_ver) {
> +			/* controller version 1.6 or above */
> +			ctrl = __raw_readl(&usb_sys_regs->control);
> +			ctrl &= ~USB_CTRL_UTMI_PHY_EN;
> +			ctrl |= USB_CTRL_USB_EN;
> +			__raw_writel(ctrl, &usb_sys_regs->control);
> +		}
>  		portctrl |= PORTSCX_PTS_ULPI;
>  		break;
>  	case FSL_USB2_PHY_UTMI_WIDE:
>  		portctrl |= PORTSCX_PTW_16BIT;
>  		/* fall through */
>  	case FSL_USB2_PHY_UTMI:
> +		if (contr_ver) {
> +			/* controller version 1.6 or above */
> +			ctrl = __raw_readl(&usb_sys_regs->control);
> +			ctrl |= (USB_CTRL_UTMI_PHY_EN | USB_CTRL_USB_EN);
> +			__raw_writel(ctrl, &usb_sys_regs->control);
> +			mdelay(FSL_UTMI_PHY_DLY); /* Delay for UTMI PHY CLK to
> +						become stable - 10ms*/
> +		}
>  		portctrl |= PORTSCX_PTS_UTMI;
>  		break;
>  	case FSL_USB2_PHY_SERIAL:

-- 

Best Regards,
Peter Chen

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