Re: OTG2.0 support for SNPS DWC3 core

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



> Hi,
>
> On Sun, Jan 01, 2012 at 12:44:59PM -0800, idos@xxxxxxxxxxxxxx wrote:
>> I wonder if there is a work being done for OTG2.0 driver support over
>> the Synopsys dwc3 core? If so, which git/branch contain this driver?
>
> Sure there is :-) But in order to get there we must first stabilize the
> host side and that we haven't achieved yet.
>
> Still, the newest code for this driver lies in my master branch. Just
> grab a hold of that one.
>
> --
> balbi
>

Thanks Felipe,

I see that in the dwc3_probe also xhci host device is constructed with the
same irq and address base(of dwc3 core), but I couldn't see any
configuration done to the OTG registers nor a read of OSTS.ConIDSts for
determining A or B device.
I guess that the otg driver should implement the programming model
starting from figure 12-4 in the dwc3 controller spec.

If this implementation exists, can you give me a pointer, if not, what are
the plans?

Thanks a lot,
Ido
-- 
Consultant for Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum

--
To unsubscribe from this list: send the line "unsubscribe linux-usb" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html


[Index of Archives]     [Linux Media]     [Linux Input]     [Linux Audio Users]     [Yosemite News]     [Linux Kernel]     [Linux SCSI]     [Old Linux USB Devel Archive]

  Powered by Linux