RE: [RFC 1/2] fsl/usb: Add UTMI PHY support for 85xx platforms

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-----Original Message-----
From: Sebastian Andrzej Siewior [mailto:bigeasy@xxxxxxxxxxxxx] 
Sent: Tuesday, June 21, 2011 3:16 PM
To: Mehresh Ramneek-B31383
Cc: linux-usb@xxxxxxxxxxxxxxx; gregkh@xxxxxxx; Zang Roy-R61911
Subject: Re: [RFC 1/2] fsl/usb: Add UTMI PHY support for 85xx platforms

* Ramneek Mehresh | 2011-06-21 11:36:02 [+0530]:

>diff --git a/drivers/usb/gadget/fsl_udc_core.c 
>b/drivers/usb/gadget/fsl_udc_core.c
>index 2cd9a60..875eb75 100644
>--- a/drivers/usb/gadget/fsl_udc_core.c
>+++ b/drivers/usb/gadget/fsl_udc_core.c
>@@ -250,6 +250,18 @@ static int dr_controller_setup(struct fsl_udc *udc)
> 		portctrl |= PORTSCX_PTW_16BIT;
> 		/* fall through */
> 	case FSL_USB2_PHY_UTMI:
>+#if defined(CONFIG_FSL_SOC_BOOKE)

Why is this BOOK-E specific? Doesn't this apply to others as well since it is the same core?

[Ramneek]: Others (like 83xx) have different bits involved for UTMI bringup...
	     Below code is specific to BOOK-E socs having internal USB UTMI phy

>+		setbits32(&usb_sys_regs->control, USB_CTRL_UTMI_PHY_EN |
>+				USB_CTRL_USB_EN);
>+		/* UTMI PLY clk becomes stable after 10ms */
>+		udelay(10*1000);
mdelay?
[Ramneek]: Sure, why not :)  

>+		/* check for PHY clk */
>+		if (!(fsl_readl(&usb_sys_regs->control) &
>+				USB_CTRL_PHY_CLK_VLD)) {
>+			ERR("usb phy clk not found\n");
>+			return -EFAULT;
>+		}
>+#endif
> 		portctrl |= PORTSCX_PTS_UTMI;
> 		break;
> 	case FSL_USB2_PHY_SERIAL:

Sebastian


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