>
> Hi Tanya,
>
> The patch now has proper locking for the bus bandwidth mutex, and has
> been updated with some less-ugly-code-but-still-not-pretty-code for
> Alan. :) Please let me know if it fixes your issue. Even if your UAS
> device hangs after the second Configure Endpoint command is submitted,
> it would be helpful to know that the code fixes the xHCI issue.
>
> Sarah Sharp
Hi Sarah,
Sorry it took me some time to test this, I was working on the SS support
patches that finally got excepted :)
I ran the test with the patch below. The device hangs so I can't say that
the whole "change configuration" procedure is working. I went over the dmesg
log on the host side and saw something strange:
[ 794.102919] xhci_hcd 0000:01:00.0: Endpoint 0x81 not halted, refusing to
reset.
[ 794.102922] xhci_hcd 0000:01:00.0: Endpoint 0x1 not halted, refusing to
reset.
[ 794.102924] xhci_hcd 0000:01:00.0: Endpoint 0x82 not halted, refusing to
reset.
[ 794.102927] xhci_hcd 0000:01:00.0: Endpoint 0x2 not halted, refusing to
reset.
[ 794.102933] usb 10-1: adding 10-1:2.0 (config #2, interface 0)
[ 794.102969] libusual 10-1:2.0: usb_probe_interface
[ 794.102972] libusual 10-1:2.0: usb_probe_interface - got id
[ 794.103011] uas 10-1:2.0: usb_probe_interface
[ 794.103013] uas 10-1:2.0: usb_probe_interface - got id
[ 794.104920] Initializing USB Mass Storage driver...
[ 794.106383] scsi8 : uas
The full log is attached.
What do you think could have happened here? I didn't manage to retrieve any
logs from the device so I have no idea what happened there. My next move is
to record the USB traffic but I doubt it will show anything useful...
Thanks,
Tanya Brokhman
---
Sent by an consultant of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
> drivers/usb/core/hub.c | 3 +++
> drivers/usb/core/message.c | 15 ++++++++++++++-
> 2 files changed, 17 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
> index 79a58c3..4372ae3 100644
> --- a/drivers/usb/core/hub.c
> +++ b/drivers/usb/core/hub.c
> @@ -1632,6 +1632,7 @@ void usb_disconnect(struct usb_device **pdev)
> {
> struct usb_device *udev = *pdev;
> int i;
> + struct usb_hcd *hcd = bus_to_hcd(udev->bus);
>
> if (!udev) {
> pr_debug ("%s nodev\n", __func__);
> @@ -1659,7 +1660,9 @@ void usb_disconnect(struct usb_device **pdev)
> * so that the hardware is now fully quiesced.
> */
> dev_dbg (&udev->dev, "unregistering device\n");
> + mutex_lock(hcd->bandwidth_mutex);
> usb_disable_device(udev, 0);
> + mutex_unlock(hcd->bandwidth_mutex);
> usb_hcd_synchronize_unlinks(udev);
>
> usb_remove_ep_devs(&udev->ep0);
> diff --git a/drivers/usb/core/message.c b/drivers/usb/core/message.c
> index 5701e85..64c7ab4 100644
> --- a/drivers/usb/core/message.c
> +++ b/drivers/usb/core/message.c
> @@ -1135,10 +1135,13 @@ void usb_disable_interface(struct usb_device
> *dev, struct usb_interface *intf,
> * Deallocates hcd/hardware state for the endpoints (nuking all or
> most
> * pending urbs) and usbcore state for the interfaces, so that usbcore
> * must usb_set_configuration() before any interfaces could be used.
> + *
> + * Must be called with hcd->bandwidth_mutex held.
> */
> void usb_disable_device(struct usb_device *dev, int skip_ep0)
> {
> int i;
> + struct usb_hcd *hcd = bus_to_hcd(dev->bus);
>
> /* getting rid of interfaces will disconnect
> * any drivers bound to them (a key side effect)
> @@ -1172,6 +1175,16 @@ void usb_disable_device(struct usb_device *dev,
> int skip_ep0)
>
> dev_dbg(&dev->dev, "%s nuking %s URBs\n", __func__,
> skip_ep0 ? "non-ep0" : "all");
> + if (hcd->driver->check_bandwidth) {
> + /* First pass: Cancel URBs, leave endpoint pointers intact.
> */
> + for (i = skip_ep0; i < 16; ++i) {
> + usb_disable_endpoint(dev, i, false);
> + usb_disable_endpoint(dev, i + USB_DIR_IN, false);
> + }
> + /* Remove endpoints from the host controller internal state
> */
> + usb_hcd_alloc_bandwidth(dev, NULL, NULL, NULL);
> + /* Second pass: remove endpoint pointers */
> + }
> for (i = skip_ep0; i < 16; ++i) {
> usb_disable_endpoint(dev, i, true);
> usb_disable_endpoint(dev, i + USB_DIR_IN, true);
> @@ -1727,6 +1740,7 @@ free_interfaces:
> /* if it's already configured, clear out old state first.
> * getting rid of old interfaces means unbinding their drivers.
> */
> + mutex_lock(hcd->bandwidth_mutex);
> if (dev->state != USB_STATE_ADDRESS)
> usb_disable_device(dev, 1); /* Skip ep0 */
>
> @@ -1739,7 +1753,6 @@ free_interfaces:
> * host controller will not allow submissions to dropped
> endpoints. If
> * this call fails, the device state is unchanged.
> */
> - mutex_lock(hcd->bandwidth_mutex);
> ret = usb_hcd_alloc_bandwidth(dev, cp, NULL, NULL);
> if (ret < 0) {
> mutex_unlock(hcd->bandwidth_mutex);
> --
> 1.7.4.1
[ 793.760007] xhci_hcd 0000:01:00.0: Poll event ring: 4295016672
[ 793.760011] xhci_hcd 0000:01:00.0: op reg status = 0x0
[ 793.760015] xhci_hcd 0000:01:00.0: ir_set 0 pending = 0x2
[ 793.760017] xhci_hcd 0000:01:00.0: HC error bitmask = 0x0
[ 793.760019] xhci_hcd 0000:01:00.0: Event ring:
[ 793.760023] xhci_hcd 0000:01:00.0: @000000003781b400 3781b9c0 00000000 01000000 01028000
[ 793.760026] xhci_hcd 0000:01:00.0: @000000003781b410 c185f6b0 00000000 01000000 01038000
[ 793.760029] xhci_hcd 0000:01:00.0: @000000003781b420 3781b9d0 00000000 01000000 01028000
[ 793.760032] xhci_hcd 0000:01:00.0: @000000003781b430 c185f6c0 00000000 01000000 01038000
[ 793.760035] xhci_hcd 0000:01:00.0: @000000003781b440 3781bbd0 00000000 01000000 01028001
[ 793.760038] xhci_hcd 0000:01:00.0: @000000003781b450 c185f4d0 00000000 01000000 01038001
[ 793.760042] xhci_hcd 0000:01:00.0: @000000003781b460 3781bbe0 00000000 01000000 01028001
[ 793.760045] xhci_hcd 0000:01:00.0: @000000003781b470 c185f4e0 00000000 01000000 01038001
[ 793.760048] xhci_hcd 0000:01:00.0: @000000003781b480 3781b800 00000000 01000000 01028001
[ 793.760051] xhci_hcd 0000:01:00.0: @000000003781b490 c185f4f0 00000000 01000000 01038001
[ 793.760054] xhci_hcd 0000:01:00.0: @000000003781b4a0 3781b810 00000000 01000000 01028001
[ 793.760057] xhci_hcd 0000:01:00.0: @000000003781b4b0 c185f500 00000000 01000000 01038001
[ 793.760060] xhci_hcd 0000:01:00.0: @000000003781b4c0 3781b820 00000000 01000000 01028001
[ 793.760063] xhci_hcd 0000:01:00.0: @000000003781b4d0 c185f510 00000000 01000000 01038001
[ 793.760066] xhci_hcd 0000:01:00.0: @000000003781b4e0 3781b830 00000000 01000000 01028001
[ 793.760069] xhci_hcd 0000:01:00.0: @000000003781b4f0 c185f520 00000000 01000000 01038001
[ 793.760073] xhci_hcd 0000:01:00.0: @000000003781b500 3781b840 00000000 01000000 01028001
[ 793.760076] xhci_hcd 0000:01:00.0: @000000003781b510 c185f530 00000000 01000000 01038001
[ 793.760079] xhci_hcd 0000:01:00.0: @000000003781b520 3781b850 00000000 01000000 01028001
[ 793.760082] xhci_hcd 0000:01:00.0: @000000003781b530 c185f540 00000000 01000000 01038001
[ 793.760085] xhci_hcd 0000:01:00.0: @000000003781b540 3781b860 00000000 01000000 01028001
[ 793.760088] xhci_hcd 0000:01:00.0: @000000003781b550 c185f550 00000000 01000000 01038001
[ 793.760091] xhci_hcd 0000:01:00.0: @000000003781b560 3781b870 00000000 01000000 01028001
[ 793.760094] xhci_hcd 0000:01:00.0: @000000003781b570 c185f560 00000000 01000000 01038001
[ 793.760097] xhci_hcd 0000:01:00.0: @000000003781b580 3781b880 00000000 01000000 01028001
[ 793.760100] xhci_hcd 0000:01:00.0: @000000003781b590 c185f570 00000000 01000000 01038001
[ 793.760104] xhci_hcd 0000:01:00.0: @000000003781b5a0 3781b890 00000000 01000000 01028001
[ 793.760107] xhci_hcd 0000:01:00.0: @000000003781b5b0 c185f580 00000000 01000000 01038001
[ 793.760110] xhci_hcd 0000:01:00.0: @000000003781b5c0 3781b8a0 00000000 01000000 01028001
[ 793.760113] xhci_hcd 0000:01:00.0: @000000003781b5d0 c185f590 00000000 01000000 01038001
[ 793.760116] xhci_hcd 0000:01:00.0: @000000003781b5e0 3781b8b0 00000000 01000000 01028001
[ 793.760119] xhci_hcd 0000:01:00.0: @000000003781b5f0 c185f5a0 00000000 01000000 01038001
[ 793.760122] xhci_hcd 0000:01:00.0: @000000003781b600 3781b8c0 00000000 01000000 01028001
[ 793.760125] xhci_hcd 0000:01:00.0: @000000003781b610 c185f5b0 00000000 01000000 01038001
[ 793.760128] xhci_hcd 0000:01:00.0: @000000003781b620 3781b8d0 00000000 01000000 01028001
[ 793.760132] xhci_hcd 0000:01:00.0: @000000003781b630 c185f5c0 00000000 01000000 01038001
[ 793.760135] xhci_hcd 0000:01:00.0: @000000003781b640 3781b8e0 00000000 01000000 01028001
[ 793.760138] xhci_hcd 0000:01:00.0: @000000003781b650 c185f5d0 00000000 01000000 01038001
[ 793.760141] xhci_hcd 0000:01:00.0: @000000003781b660 3781b8f0 00000000 01000000 01028001
[ 793.760144] xhci_hcd 0000:01:00.0: @000000003781b670 c185f5e0 00000000 01000000 01038001
[ 793.760147] xhci_hcd 0000:01:00.0: @000000003781b680 3781b900 00000000 01000000 01028001
[ 793.760150] xhci_hcd 0000:01:00.0: @000000003781b690 c185f5f0 00000000 01000000 01038001
[ 793.760153] xhci_hcd 0000:01:00.0: @000000003781b6a0 3781b910 00000000 01000000 01028001
[ 793.760156] xhci_hcd 0000:01:00.0: @000000003781b6b0 c185f600 00000000 01000000 01038001
[ 793.760159] xhci_hcd 0000:01:00.0: @000000003781b6c0 3781b920 00000000 01000000 01028001
[ 793.760162] xhci_hcd 0000:01:00.0: @000000003781b6d0 c185f610 00000000 01000000 01038001
[ 793.760165] xhci_hcd 0000:01:00.0: @000000003781b6e0 3781b930 00000000 01000000 01028001
[ 793.760169] xhci_hcd 0000:01:00.0: @000000003781b6f0 c185f620 00000000 01000000 01038001
[ 793.760172] xhci_hcd 0000:01:00.0: @000000003781b700 3781b940 00000000 01000000 01028001
[ 793.760175] xhci_hcd 0000:01:00.0: @000000003781b710 c185f630 00000000 01000000 01038001
[ 793.760178] xhci_hcd 0000:01:00.0: @000000003781b720 3781b950 00000000 01000000 01028001
[ 793.760181] xhci_hcd 0000:01:00.0: @000000003781b730 c185f640 00000000 01000000 01038001
[ 793.760184] xhci_hcd 0000:01:00.0: @000000003781b740 3781b960 00000000 01000000 01028001
[ 793.760187] xhci_hcd 0000:01:00.0: @000000003781b750 c185f650 00000000 01000000 01038001
[ 793.760190] xhci_hcd 0000:01:00.0: @000000003781b760 3781b970 00000000 01000000 01028001
[ 793.760193] xhci_hcd 0000:01:00.0: @000000003781b770 c185f660 00000000 01000000 01038001
[ 793.760196] xhci_hcd 0000:01:00.0: @000000003781b780 3781b980 00000000 01000000 01028001
[ 793.760200] xhci_hcd 0000:01:00.0: @000000003781b790 c185f670 00000000 01000000 01038001
[ 793.760203] xhci_hcd 0000:01:00.0: @000000003781b7a0 3781b990 00000000 01000000 01028001
[ 793.760206] xhci_hcd 0000:01:00.0: @000000003781b7b0 c185f680 00000000 01000000 01038001
[ 793.760209] xhci_hcd 0000:01:00.0: @000000003781b7c0 3781b9a0 00000000 01000000 01028001
[ 793.760212] xhci_hcd 0000:01:00.0: @000000003781b7d0 c185f690 00000000 01000000 01038001
[ 793.760215] xhci_hcd 0000:01:00.0: @000000003781b7e0 3781b9b0 00000000 01000000 01028001
[ 793.760218] xhci_hcd 0000:01:00.0: @000000003781b7f0 c185f6a0 00000000 01000000 01038001
[ 793.760222] xhci_hcd 0000:01:00.0: Ring deq = ffff88003781b440 (virt), 0x3781b440 (dma)
[ 793.760225] xhci_hcd 0000:01:00.0: Ring deq updated 452 times
[ 793.760227] xhci_hcd 0000:01:00.0: Ring enq = ffff88003781b400 (virt), 0x3781b400 (dma)
[ 793.760230] xhci_hcd 0000:01:00.0: Ring enq updated 0 times
[ 793.760234] xhci_hcd 0000:01:00.0: ERST deq = 64'h3781b440
[ 793.760237] xhci_hcd 0000:01:00.0: Command ring:
[ 793.760240] xhci_hcd 0000:01:00.0: @000000003781b000 00000000 00000000 00000000 0000c401
[ 793.760243] xhci_hcd 0000:01:00.0: @000000003781b010 00000000 00000000 00000000 00002401
[ 793.760246] xhci_hcd 0000:01:00.0: @000000003781b020 00000000 00000000 00000000 01004401
[ 793.760249] xhci_hcd 0000:01:00.0: @000000003781b030 c186d000 00000000 00000000 01002c01
[ 793.760252] xhci_hcd 0000:01:00.0: @000000003781b040 c186d000 00000000 00000000 01003001
[ 793.760255] xhci_hcd 0000:01:00.0: @000000003781b050 00000000 00000000 00000000 01033801
[ 793.760258] xhci_hcd 0000:01:00.0: @000000003781b060 c185f0a1 00000000 00000000 01034001
[ 793.760261] xhci_hcd 0000:01:00.0: @000000003781b070 00000000 00000000 00000000 01033c01
[ 793.760264] xhci_hcd 0000:01:00.0: @000000003781b080 00000000 00000000 00000000 01004401
[ 793.760267] xhci_hcd 0000:01:00.0: @000000003781b090 c186d000 00000000 00000000 01002c01
[ 793.760270] xhci_hcd 0000:01:00.0: @000000003781b0a0 c186d000 00000000 00000000 01003001
[ 793.760273] xhci_hcd 0000:01:00.0: @000000003781b0b0 00000000 00000000 00000000 01033801
[ 793.760276] xhci_hcd 0000:01:00.0: @000000003781b0c0 c185f811 00000000 00000000 01034001
[ 793.760279] xhci_hcd 0000:01:00.0: @000000003781b0d0 00000000 00000000 00000000 01033801
[ 793.760282] xhci_hcd 0000:01:00.0: @000000003781b0e0 c185f871 00000000 00000000 01034001
[ 793.760285] xhci_hcd 0000:01:00.0: @000000003781b0f0 00000000 00000000 00000000 01033801
[ 793.760289] xhci_hcd 0000:01:00.0: @000000003781b100 c185f8e1 00000000 00000000 01034001
[ 793.760291] xhci_hcd 0000:01:00.0: @000000003781b110 00000000 00000000 00000000 01033801
[ 793.760295] xhci_hcd 0000:01:00.0: @000000003781b120 c185f911 00000000 00000000 01034001
[ 793.760298] xhci_hcd 0000:01:00.0: @000000003781b130 00000000 00000000 00000000 01033c01
[ 793.760301] xhci_hcd 0000:01:00.0: @000000003781b140 c186d000 00000000 00000000 01003001
[ 793.760304] xhci_hcd 0000:01:00.0: @000000003781b150 00000000 00000000 00000000 01002801
[ 793.760307] xhci_hcd 0000:01:00.0: @000000003781b160 00000000 00000000 00000000 00002401
[ 793.760310] xhci_hcd 0000:01:00.0: @000000003781b170 00000000 00000000 00000000 01004401
[ 793.760313] xhci_hcd 0000:01:00.0: @000000003781b180 37949000 00000000 00000000 01002c01
[ 793.760316] xhci_hcd 0000:01:00.0: @000000003781b190 37949000 00000000 00000000 01003001
[ 793.760319] xhci_hcd 0000:01:00.0: @000000003781b1a0 00000000 00000000 00000000 01033801
[ 793.760322] xhci_hcd 0000:01:00.0: @000000003781b1b0 c18404a1 00000000 00000000 01034001
[ 793.760325] xhci_hcd 0000:01:00.0: @000000003781b1c0 00000000 00000000 00000000 01033c01
[ 793.760328] xhci_hcd 0000:01:00.0: @000000003781b1d0 00000000 00000000 00000000 01004401
[ 793.760331] xhci_hcd 0000:01:00.0: @000000003781b1e0 37949000 00000000 00000000 01002c01
[ 793.760334] xhci_hcd 0000:01:00.0: @000000003781b1f0 37949000 00000000 00000000 01003001
[ 793.760337] xhci_hcd 0000:01:00.0: @000000003781b200 00000000 00000000 00000000 01033801
[ 793.760340] xhci_hcd 0000:01:00.0: @000000003781b210 c185f811 00000000 00000000 01034001
[ 793.760343] xhci_hcd 0000:01:00.0: @000000003781b220 00000000 00000000 00000000 01033801
[ 793.760346] xhci_hcd 0000:01:00.0: @000000003781b230 c185f871 00000000 00000000 01034001
[ 793.760349] xhci_hcd 0000:01:00.0: @000000003781b240 00000000 00000000 00000000 01033801
[ 793.760352] xhci_hcd 0000:01:00.0: @000000003781b250 c185f8e1 00000000 00000000 01034001
[ 793.760355] xhci_hcd 0000:01:00.0: @000000003781b260 00000000 00000000 00000000 01033801
[ 793.760358] xhci_hcd 0000:01:00.0: @000000003781b270 c185f911 00000000 00000000 01034001
[ 793.760361] xhci_hcd 0000:01:00.0: @000000003781b280 00000000 00000000 00000000 01033c01
[ 793.760364] xhci_hcd 0000:01:00.0: @000000003781b290 00000000 00000000 00000000 01004401
[ 793.760367] xhci_hcd 0000:01:00.0: @000000003781b2a0 37949000 00000000 00000000 01002c01
[ 793.760370] xhci_hcd 0000:01:00.0: @000000003781b2b0 37949000 00000000 00000000 01003001
[ 793.760373] xhci_hcd 0000:01:00.0: @000000003781b2c0 00000000 00000000 00000000 01033801
[ 793.760377] xhci_hcd 0000:01:00.0: @000000003781b2d0 c185f411 00000000 00000000 01034001
[ 793.760380] xhci_hcd 0000:01:00.0: @000000003781b2e0 00000000 00000000 00000000 01033801
[ 793.760383] xhci_hcd 0000:01:00.0: @000000003781b2f0 c185f471 00000000 00000000 01034001
[ 793.760386] xhci_hcd 0000:01:00.0: @000000003781b300 00000000 00000000 00000000 01033801
[ 793.760389] xhci_hcd 0000:01:00.0: @000000003781b310 c185f4b1 00000000 00000000 01034001
[ 793.760392] xhci_hcd 0000:01:00.0: @000000003781b320 00000000 00000000 00000000 00000000
[ 793.760395] xhci_hcd 0000:01:00.0: @000000003781b330 00000000 00000000 00000000 00000000
[ 793.760398] xhci_hcd 0000:01:00.0: @000000003781b340 00000000 00000000 00000000 00000000
[ 793.760401] xhci_hcd 0000:01:00.0: @000000003781b350 00000000 00000000 00000000 00000000
[ 793.760403] xhci_hcd 0000:01:00.0: @000000003781b360 00000000 00000000 00000000 00000000
[ 793.760406] xhci_hcd 0000:01:00.0: @000000003781b370 00000000 00000000 00000000 00000000
[ 793.760409] xhci_hcd 0000:01:00.0: @000000003781b380 00000000 00000000 00000000 00000000
[ 793.760412] xhci_hcd 0000:01:00.0: @000000003781b390 00000000 00000000 00000000 00000000
[ 793.760415] xhci_hcd 0000:01:00.0: @000000003781b3a0 00000000 00000000 00000000 00000000
[ 793.760418] xhci_hcd 0000:01:00.0: @000000003781b3b0 00000000 00000000 00000000 00000000
[ 793.760421] xhci_hcd 0000:01:00.0: @000000003781b3c0 00000000 00000000 00000000 00000000
[ 793.760424] xhci_hcd 0000:01:00.0: @000000003781b3d0 00000000 00000000 00000000 00000000
[ 793.760427] xhci_hcd 0000:01:00.0: @000000003781b3e0 00000000 00000000 00000000 00000000
[ 793.760430] xhci_hcd 0000:01:00.0: @000000003781b3f0 3781b000 00000000 00000000 00001802
[ 793.760433] xhci_hcd 0000:01:00.0: Ring deq = ffff88003781b320 (virt), 0x3781b320 (dma)
[ 793.760435] xhci_hcd 0000:01:00.0: Ring deq updated 50 times
[ 793.760438] xhci_hcd 0000:01:00.0: Ring enq = ffff88003781b320 (virt), 0x3781b320 (dma)
[ 793.760441] xhci_hcd 0000:01:00.0: Ring enq updated 50 times
[ 793.760445] xhci_hcd 0000:01:00.0: // xHC command ring deq ptr low bits + flags = @00000008
[ 793.760448] xhci_hcd 0000:01:00.0: // xHC command ring deq ptr high bits = @00000000
[ 793.760451] xhci_hcd 0000:01:00.0: Dev 1 endpoint ring 0:
[ 793.760454] xhci_hcd 0000:01:00.0: @00000000c1840000 378e88a0 00000000 00000012 00010c04
[ 793.760457] xhci_hcd 0000:01:00.0: @00000000c1840010 00000000 00000000 00000000 00001020
[ 793.760460] xhci_hcd 0000:01:00.0: @00000000c1840020 02000680 002c0000 00000008 00000840
[ 793.760464] xhci_hcd 0000:01:00.0: @00000000c1840030 0048bf00 00000001 0000002c 00010c04
[ 793.760467] xhci_hcd 0000:01:00.0: @00000000c1840040 00000000 00000000 00000000 00001020
[ 793.760470] xhci_hcd 0000:01:00.0: @00000000c1840050 02010680 00560000 00000008 00000840
[ 793.760473] xhci_hcd 0000:01:00.0: @00000000c1840060 0048bf00 00000001 00000056 00010c04
[ 793.760476] xhci_hcd 0000:01:00.0: @00000000c1840070 00000000 00000000 00000000 00001020
[ 793.760479] xhci_hcd 0000:01:00.0: @00000000c1840080 00010900 00000000 00000008 00000840
[ 793.760482] xhci_hcd 0000:01:00.0: @00000000c1840090 00000000 00000000 00000000 00011020
[ 793.760485] xhci_hcd 0000:01:00.0: @00000000c18400a0 00000102 00000081 00000008 00000840
[ 793.760488] xhci_hcd 0000:01:00.0: @00000000c18400b0 00000000 00000000 00000000 00011020
[ 793.760491] xhci_hcd 0000:01:00.0: @00000000c18400c0 00000102 00000081 00000008 00000840
[ 793.760494] xhci_hcd 0000:01:00.0: @00000000c18400d0 00000000 00000000 00000000 00011020
[ 793.760497] xhci_hcd 0000:01:00.0: @00000000c18400e0 00000102 00000081 00000008 00000840
[ 793.760500] xhci_hcd 0000:01:00.0: @00000000c18400f0 00000000 00000000 00000000 00011020
[ 793.760504] xhci_hcd 0000:01:00.0: @00000000c1840100 23379900 00000001 00000056 00010c05
[ 793.760507] xhci_hcd 0000:01:00.0: @00000000c1840110 00000000 00000000 00000000 00001021
[ 793.760510] xhci_hcd 0000:01:00.0: @00000000c1840120 03000680 00ff0000 00000008 00000841
[ 793.760513] xhci_hcd 0000:01:00.0: @00000000c1840130 22a38400 00000001 000000ff 00010c05
[ 793.760516] xhci_hcd 0000:01:00.0: @00000000c1840140 00000000 00000000 00000000 00001021
[ 793.760519] xhci_hcd 0000:01:00.0: @00000000c1840150 03030680 00ff0409 00000008 00000841
[ 793.760522] xhci_hcd 0000:01:00.0: @00000000c1840160 22a38400 00000001 000000ff 00010c05
[ 793.760525] xhci_hcd 0000:01:00.0: @00000000c1840170 00000000 00000000 00000000 00001021
[ 793.760528] xhci_hcd 0000:01:00.0: @00000000c1840180 03020680 00ff0409 00000008 00000841
[ 793.760532] xhci_hcd 0000:01:00.0: @00000000c1840190 22a38400 00000001 000000ff 00010c05
[ 793.760534] xhci_hcd 0000:01:00.0: @00000000c18401a0 00000000 00000000 00000000 00001021
[ 793.760538] xhci_hcd 0000:01:00.0: @00000000c18401b0 00010900 00000000 00000008 00000841
[ 793.760541] xhci_hcd 0000:01:00.0: @00000000c18401c0 00000000 00000000 00000000 00011021
[ 793.760544] xhci_hcd 0000:01:00.0: @00000000c18401d0 03010680 00ff0409 00000008 00000841
[ 793.760547] xhci_hcd 0000:01:00.0: @00000000c18401e0 22a39400 00000001 000000ff 00010c05
[ 793.760550] xhci_hcd 0000:01:00.0: @00000000c18401f0 00000000 00000000 00000000 00001021
[ 793.760553] xhci_hcd 0000:01:00.0: @00000000c1840200 0000fea1 00010000 00000008 00000841
[ 793.760556] xhci_hcd 0000:01:00.0: @00000000c1840210 c1802000 00000000 00000001 00010c05
[ 793.760559] xhci_hcd 0000:01:00.0: @00000000c1840220 00000000 00000000 00000000 00001021
[ 793.760562] xhci_hcd 0000:01:00.0: @00000000c1840230 00000102 00000081 00000008 00000841
[ 793.760565] xhci_hcd 0000:01:00.0: @00000000c1840240 00000000 00000000 00000000 00011021
[ 793.760568] xhci_hcd 0000:01:00.0: @00000000c1840250 01000680 00080000 00000008 00000841
[ 793.760571] xhci_hcd 0000:01:00.0: @00000000c1840260 21a32d00 00000001 00000008 00010c05
[ 793.760574] xhci_hcd 0000:01:00.0: @00000000c1840270 00000000 00000000 00000000 00001021
[ 793.760577] xhci_hcd 0000:01:00.0: @00000000c1840280 01000680 00120000 00000008 00000841
[ 793.760581] xhci_hcd 0000:01:00.0: @00000000c1840290 21a32d00 00000001 00000012 00010c05
[ 793.760584] xhci_hcd 0000:01:00.0: @00000000c18402a0 00000000 00000000 00000000 00001021
[ 793.760587] xhci_hcd 0000:01:00.0: @00000000c18402b0 02000680 002c0000 00000008 00000841
[ 793.760590] xhci_hcd 0000:01:00.0: @00000000c18402c0 00523780 00000001 0000002c 00010c05
[ 793.760593] xhci_hcd 0000:01:00.0: @00000000c18402d0 00000000 00000000 00000000 00001021
[ 793.760596] xhci_hcd 0000:01:00.0: @00000000c18402e0 02010680 00560000 00000008 00000841
[ 793.760599] xhci_hcd 0000:01:00.0: @00000000c18402f0 00523780 00000001 00000056 00010c05
[ 793.760602] xhci_hcd 0000:01:00.0: @00000000c1840300 00000000 00000000 00000000 00001021
[ 793.760605] xhci_hcd 0000:01:00.0: @00000000c1840310 00010900 00000000 00000008 00000841
[ 793.760608] xhci_hcd 0000:01:00.0: @00000000c1840320 00000000 00000000 00000000 00011021
[ 793.760611] xhci_hcd 0000:01:00.0: @00000000c1840330 00000102 00000081 00000008 00000841
[ 793.760614] xhci_hcd 0000:01:00.0: @00000000c1840340 00000000 00000000 00000000 00011021
[ 793.760617] xhci_hcd 0000:01:00.0: @00000000c1840350 00000102 00000081 00000008 00000841
[ 793.760620] xhci_hcd 0000:01:00.0: @00000000c1840360 00000000 00000000 00000000 00011021
[ 793.760624] xhci_hcd 0000:01:00.0: @00000000c1840370 00000102 00000081 00000008 00000841
[ 793.760627] xhci_hcd 0000:01:00.0: @00000000c1840380 00000000 00000000 00000000 00011021
[ 793.760630] xhci_hcd 0000:01:00.0: @00000000c1840390 00000102 00000081 00000008 00000841
[ 793.760633] xhci_hcd 0000:01:00.0: @00000000c18403a0 00000000 00000000 00000000 00011021
[ 793.760636] xhci_hcd 0000:01:00.0: @00000000c18403b0 01000680 00080000 00000008 00000841
[ 793.760639] xhci_hcd 0000:01:00.0: @00000000c18403c0 378e88a0 00000000 00000008 00010c05
[ 793.760642] xhci_hcd 0000:01:00.0: @00000000c18403d0 00000000 00000000 00000000 00001021
[ 793.760645] xhci_hcd 0000:01:00.0: @00000000c18403e0 01000680 00120000 00000008 00000841
[ 793.760648] xhci_hcd 0000:01:00.0: @00000000c18403f0 c1840000 00000000 00000000 00001803
[ 793.760651] xhci_hcd 0000:01:00.0: Dev 1 endpoint ring 1:
[ 793.760654] xhci_hcd 0000:01:00.0: @000000003781b800 c1802000 00000000 0000001f 00000420
[ 793.760657] xhci_hcd 0000:01:00.0: @000000003781b810 c1802000 00000000 0000001f 00000420
[ 793.760660] xhci_hcd 0000:01:00.0: @000000003781b820 c1802000 00000000 0000001f 00000420
[ 793.760663] xhci_hcd 0000:01:00.0: @000000003781b830 c1802000 00000000 0000001f 00000420
[ 793.760667] xhci_hcd 0000:01:00.0: @000000003781b840 c1802000 00000000 0000001f 00000420
[ 793.760670] xhci_hcd 0000:01:00.0: @000000003781b850 c1802000 00000000 0000001f 00000420
[ 793.760673] xhci_hcd 0000:01:00.0: @000000003781b860 c1802000 00000000 0000001f 00000420
[ 793.760676] xhci_hcd 0000:01:00.0: @000000003781b870 c1802000 00000000 0000001f 00000420
[ 793.760679] xhci_hcd 0000:01:00.0: @000000003781b880 c1802000 00000000 0000001f 00000420
[ 793.760682] xhci_hcd 0000:01:00.0: @000000003781b890 c1802000 00000000 0000001f 00000420
[ 793.760685] xhci_hcd 0000:01:00.0: @000000003781b8a0 c1802000 00000000 0000001f 00000420
[ 793.760688] xhci_hcd 0000:01:00.0: @000000003781b8b0 c1802000 00000000 0000001f 00000420
[ 793.760691] xhci_hcd 0000:01:00.0: @000000003781b8c0 c1802000 00000000 0000001f 00000420
[ 793.760694] xhci_hcd 0000:01:00.0: @000000003781b8d0 c1802000 00000000 0000001f 00000420
[ 793.760698] xhci_hcd 0000:01:00.0: @000000003781b8e0 c1802000 00000000 0000001f 00000420
[ 793.760701] xhci_hcd 0000:01:00.0: @000000003781b8f0 c1802000 00000000 0000001f 00000420
[ 793.760704] xhci_hcd 0000:01:00.0: @000000003781b900 c1802000 00000000 0000001f 00000420
[ 793.760707] xhci_hcd 0000:01:00.0: @000000003781b910 c1802000 00000000 0000001f 00000420
[ 793.760710] xhci_hcd 0000:01:00.0: @000000003781b920 c1802000 00000000 0000001f 00000420
[ 793.760713] xhci_hcd 0000:01:00.0: @000000003781b930 c1802000 00000000 0000001f 00000420
[ 793.760716] xhci_hcd 0000:01:00.0: @000000003781b940 c1802000 00000000 0000001f 00000420
[ 793.760719] xhci_hcd 0000:01:00.0: @000000003781b950 c1802000 00000000 0000001f 00000420
[ 793.760722] xhci_hcd 0000:01:00.0: @000000003781b960 c1802000 00000000 0000001f 00000420
[ 793.760725] xhci_hcd 0000:01:00.0: @000000003781b970 c1802000 00000000 0000001f 00000420
[ 793.760729] xhci_hcd 0000:01:00.0: @000000003781b980 c1802000 00000000 0000001f 00000420
[ 793.760732] xhci_hcd 0000:01:00.0: @000000003781b990 c1802000 00000000 0000001f 00000420
[ 793.760735] xhci_hcd 0000:01:00.0: @000000003781b9a0 c1802000 00000000 0000001f 00000420
[ 793.760738] xhci_hcd 0000:01:00.0: @000000003781b9b0 c1802000 00000000 0000001f 00000420
[ 793.760741] xhci_hcd 0000:01:00.0: @000000003781b9c0 c1802000 00000000 0000001f 00000420
[ 793.760744] xhci_hcd 0000:01:00.0: @000000003781b9d0 c1802000 00000000 0000001f 00000420
[ 793.760747] xhci_hcd 0000:01:00.0: @000000003781b9e0 c1802000 00000000 0000001f 00000421
[ 793.760750] xhci_hcd 0000:01:00.0: @000000003781b9f0 c1802000 00000000 0000001f 00000421
[ 793.760753] xhci_hcd 0000:01:00.0: @000000003781ba00 c1802000 00000000 0000001f 00000421
[ 793.760756] xhci_hcd 0000:01:00.0: @000000003781ba10 c1802000 00000000 0000001f 00000421
[ 793.760760] xhci_hcd 0000:01:00.0: @000000003781ba20 c1802000 00000000 0000001f 00000421
[ 793.760763] xhci_hcd 0000:01:00.0: @000000003781ba30 c1802000 00000000 0000001f 00000421
[ 793.760766] xhci_hcd 0000:01:00.0: @000000003781ba40 c1802000 00000000 0000001f 00000421
[ 793.760769] xhci_hcd 0000:01:00.0: @000000003781ba50 c1802000 00000000 0000001f 00000421
[ 793.760772] xhci_hcd 0000:01:00.0: @000000003781ba60 c1802000 00000000 0000001f 00000421
[ 793.760775] xhci_hcd 0000:01:00.0: @000000003781ba70 c1802000 00000000 0000001f 00000421
[ 793.760778] xhci_hcd 0000:01:00.0: @000000003781ba80 c1802000 00000000 0000001f 00000421
[ 793.760781] xhci_hcd 0000:01:00.0: @000000003781ba90 c1802000 00000000 0000001f 00000421
[ 793.760784] xhci_hcd 0000:01:00.0: @000000003781baa0 c1802000 00000000 0000001f 00000421
[ 793.760787] xhci_hcd 0000:01:00.0: @000000003781bab0 c1802000 00000000 0000001f 00000421
[ 793.760791] xhci_hcd 0000:01:00.0: @000000003781bac0 c1802000 00000000 0000001f 00000421
[ 793.760794] xhci_hcd 0000:01:00.0: @000000003781bad0 c1802000 00000000 0000001f 00000421
[ 793.760797] xhci_hcd 0000:01:00.0: @000000003781bae0 c1802000 00000000 0000001f 00000421
[ 793.760800] xhci_hcd 0000:01:00.0: @000000003781baf0 c1802000 00000000 0000001f 00000421
[ 793.760803] xhci_hcd 0000:01:00.0: @000000003781bb00 c1802000 00000000 0000001f 00000421
[ 793.760806] xhci_hcd 0000:01:00.0: @000000003781bb10 c1802000 00000000 0000001f 00000421
[ 793.760809] xhci_hcd 0000:01:00.0: @000000003781bb20 c1802000 00000000 0000001f 00000421
[ 793.760812] xhci_hcd 0000:01:00.0: @000000003781bb30 c1802000 00000000 0000001f 00000421
[ 793.760815] xhci_hcd 0000:01:00.0: @000000003781bb40 c1802000 00000000 0000001f 00000421
[ 793.760818] xhci_hcd 0000:01:00.0: @000000003781bb50 c1802000 00000000 0000001f 00000421
[ 793.760822] xhci_hcd 0000:01:00.0: @000000003781bb60 c1802000 00000000 0000001f 00000421
[ 793.760825] xhci_hcd 0000:01:00.0: @000000003781bb70 c1802000 00000000 0000001f 00000421
[ 793.760828] xhci_hcd 0000:01:00.0: @000000003781bb80 c1802000 00000000 0000001f 00000421
[ 793.760831] xhci_hcd 0000:01:00.0: @000000003781bb90 c1802000 00000000 0000001f 00000421
[ 793.760834] xhci_hcd 0000:01:00.0: @000000003781bba0 c1802000 00000000 0000001f 00000421
[ 793.760837] xhci_hcd 0000:01:00.0: @000000003781bbb0 c1802000 00000000 0000001f 00000421
[ 793.760840] xhci_hcd 0000:01:00.0: @000000003781bbc0 c1802000 00000000 0000001f 00000421
[ 793.760843] xhci_hcd 0000:01:00.0: @000000003781bbd0 c1802000 00000000 0000001f 00000421
[ 793.760846] xhci_hcd 0000:01:00.0: @000000003781bbe0 c1802000 00000000 0000001f 00000421
[ 793.760849] xhci_hcd 0000:01:00.0: @000000003781bbf0 3781b800 00000000 00000000 00001803
[ 793.760852] xhci_hcd 0000:01:00.0: Dev 1 endpoint ring 2:
[ 793.760855] xhci_hcd 0000:01:00.0: @00000000c185f400 c1802000 00000000 0000000d 00000424
[ 793.760858] xhci_hcd 0000:01:00.0: @00000000c185f410 c1802000 00000000 0000000d 00000424
[ 793.760861] xhci_hcd 0000:01:00.0: @00000000c185f420 c1802000 00000000 0000000d 00000424
[ 793.760864] xhci_hcd 0000:01:00.0: @00000000c185f430 c1802000 00000000 0000000d 00000424
[ 793.760867] xhci_hcd 0000:01:00.0: @00000000c185f440 c1802000 00000000 0000000d 00000424
[ 793.760871] xhci_hcd 0000:01:00.0: @00000000c185f450 c1802000 00000000 0000000d 00000424
[ 793.760874] xhci_hcd 0000:01:00.0: @00000000c185f460 c1802000 00000000 0000000d 00000424
[ 793.760877] xhci_hcd 0000:01:00.0: @00000000c185f470 c1802000 00000000 0000000d 00000424
[ 793.760880] xhci_hcd 0000:01:00.0: @00000000c185f480 c1802000 00000000 0000000d 00000424
[ 793.760883] xhci_hcd 0000:01:00.0: @00000000c185f490 c1802000 00000000 0000000d 00000424
[ 793.760886] xhci_hcd 0000:01:00.0: @00000000c185f4a0 c1802000 00000000 0000000d 00000424
[ 793.760889] xhci_hcd 0000:01:00.0: @00000000c185f4b0 c1802000 00000000 0000000d 00000424
[ 793.760892] xhci_hcd 0000:01:00.0: @00000000c185f4c0 c1802000 00000000 0000000d 00000424
[ 793.760895] xhci_hcd 0000:01:00.0: @00000000c185f4d0 c1802000 00000000 0000000d 00000424
[ 793.760898] xhci_hcd 0000:01:00.0: @00000000c185f4e0 c1802000 00000000 0000000d 00000424
[ 793.760901] xhci_hcd 0000:01:00.0: @00000000c185f4f0 c1802000 00000000 0000000d 00000424
[ 793.760904] xhci_hcd 0000:01:00.0: @00000000c185f500 c1802000 00000000 0000000d 00000424
[ 793.760907] xhci_hcd 0000:01:00.0: @00000000c185f510 c1802000 00000000 0000000d 00000424
[ 793.760910] xhci_hcd 0000:01:00.0: @00000000c185f520 c1802000 00000000 0000000d 00000424
[ 793.760913] xhci_hcd 0000:01:00.0: @00000000c185f530 c1802000 00000000 0000000d 00000424
[ 793.760917] xhci_hcd 0000:01:00.0: @00000000c185f540 c1802000 00000000 0000000d 00000424
[ 793.760920] xhci_hcd 0000:01:00.0: @00000000c185f550 c1802000 00000000 0000000d 00000424
[ 793.760923] xhci_hcd 0000:01:00.0: @00000000c185f560 c1802000 00000000 0000000d 00000424
[ 793.760926] xhci_hcd 0000:01:00.0: @00000000c185f570 c1802000 00000000 0000000d 00000424
[ 793.760929] xhci_hcd 0000:01:00.0: @00000000c185f580 c1802000 00000000 0000000d 00000424
[ 793.760932] xhci_hcd 0000:01:00.0: @00000000c185f590 c1802000 00000000 0000000d 00000424
[ 793.760935] xhci_hcd 0000:01:00.0: @00000000c185f5a0 c1802000 00000000 0000000d 00000424
[ 793.760938] xhci_hcd 0000:01:00.0: @00000000c185f5b0 c1802000 00000000 0000000d 00000424
[ 793.760941] xhci_hcd 0000:01:00.0: @00000000c185f5c0 c1802000 00000000 0000000d 00000424
[ 793.760944] xhci_hcd 0000:01:00.0: @00000000c185f5d0 c1802000 00000000 0000000d 00000424
[ 793.760947] xhci_hcd 0000:01:00.0: @00000000c185f5e0 c1802000 00000000 0000000d 00000424
[ 793.760951] xhci_hcd 0000:01:00.0: @00000000c185f5f0 c1802000 00000000 0000000d 00000424
[ 793.760954] xhci_hcd 0000:01:00.0: @00000000c185f600 c1802000 00000000 0000000d 00000424
[ 793.760957] xhci_hcd 0000:01:00.0: @00000000c185f610 c1802000 00000000 0000000d 00000424
[ 793.760960] xhci_hcd 0000:01:00.0: @00000000c185f620 c1802000 00000000 0000000d 00000424
[ 793.760963] xhci_hcd 0000:01:00.0: @00000000c185f630 c1802000 00000000 0000000d 00000424
[ 793.760966] xhci_hcd 0000:01:00.0: @00000000c185f640 c1802000 00000000 0000000d 00000424
[ 793.760969] xhci_hcd 0000:01:00.0: @00000000c185f650 c1802000 00000000 0000000d 00000424
[ 793.760972] xhci_hcd 0000:01:00.0: @00000000c185f660 c1802000 00000000 0000000d 00000424
[ 793.760975] xhci_hcd 0000:01:00.0: @00000000c185f670 c1802000 00000000 0000000d 00000424
[ 793.760978] xhci_hcd 0000:01:00.0: @00000000c185f680 c1802000 00000000 0000000d 00000424
[ 793.760981] xhci_hcd 0000:01:00.0: @00000000c185f690 c1802000 00000000 0000000d 00000424
[ 793.760984] xhci_hcd 0000:01:00.0: @00000000c185f6a0 c1802000 00000000 0000000d 00000424
[ 793.760987] xhci_hcd 0000:01:00.0: @00000000c185f6b0 c1802000 00000000 0000000d 00000424
[ 793.760990] xhci_hcd 0000:01:00.0: @00000000c185f6c0 c1802000 00000000 0000000d 00000424
[ 793.760993] xhci_hcd 0000:01:00.0: @00000000c185f6d0 c1802000 00000000 0000000d 00000425
[ 793.760996] xhci_hcd 0000:01:00.0: @00000000c185f6e0 c1802000 00000000 0000000d 00000425
[ 793.761000] xhci_hcd 0000:01:00.0: @00000000c185f6f0 c1802000 00000000 0000000d 00000425
[ 793.761003] xhci_hcd 0000:01:00.0: @00000000c185f700 c1802000 00000000 0000000d 00000425
[ 793.761006] xhci_hcd 0000:01:00.0: @00000000c185f710 c1802000 00000000 0000000d 00000425
[ 793.761009] xhci_hcd 0000:01:00.0: @00000000c185f720 c1802000 00000000 0000000d 00000425
[ 793.761012] xhci_hcd 0000:01:00.0: @00000000c185f730 c1802000 00000000 0000000d 00000425
[ 793.761015] xhci_hcd 0000:01:00.0: @00000000c185f740 c1802000 00000000 0000000d 00000425
[ 793.761018] xhci_hcd 0000:01:00.0: @00000000c185f750 c1802000 00000000 0000000d 00000425
[ 793.761021] xhci_hcd 0000:01:00.0: @00000000c185f760 c1802000 00000000 0000000d 00000425
[ 793.761024] xhci_hcd 0000:01:00.0: @00000000c185f770 c1802000 00000000 0000000d 00000425
[ 793.761027] xhci_hcd 0000:01:00.0: @00000000c185f780 c1802000 00000000 0000000d 00000425
[ 793.761030] xhci_hcd 0000:01:00.0: @00000000c185f790 c1802000 00000000 0000000d 00000425
[ 793.761033] xhci_hcd 0000:01:00.0: @00000000c185f7a0 c1802000 00000000 0000000d 00000425
[ 793.761036] xhci_hcd 0000:01:00.0: @00000000c185f7b0 c1802000 00000000 0000000d 00000425
[ 793.761039] xhci_hcd 0000:01:00.0: @00000000c185f7c0 c1802000 00000000 0000000d 00000425
[ 793.761042] xhci_hcd 0000:01:00.0: @00000000c185f7d0 c1802000 00000000 0000000d 00000425
[ 793.761045] xhci_hcd 0000:01:00.0: @00000000c185f7e0 c1802000 00000000 0000000d 00000425
[ 793.761049] xhci_hcd 0000:01:00.0: @00000000c185f7f0 c185f400 00000000 00000000 00001803
[ 794.100853] usb 10-1: unregistering interface 10-1:1.0
[ 794.100910] usb 10-1: usb_disable_device nuking non-ep0 URBs
[ 794.100915] xhci_hcd 0000:01:00.0: xhci_drop_endpoint called for udev ffff880121b59000
[ 794.100919] xhci_hcd 0000:01:00.0: drop ep 0x1, slot id 1, new drop flags = 0x4, new add flags = 0x0, new slot info = 0x8400000
[ 794.100923] xhci_hcd 0000:01:00.0: xhci_drop_endpoint called for udev ffff880121b59000
[ 794.100926] xhci_hcd 0000:01:00.0: drop ep 0x81, slot id 1, new drop flags = 0xc, new add flags = 0x0, new slot info = 0x8400000
[ 794.100929] xhci_hcd 0000:01:00.0: xhci_check_bandwidth called for udev ffff880121b59000
[ 794.100932] xhci_hcd 0000:01:00.0: New Input Control Context:
[ 794.100935] xhci_hcd 0000:01:00.0: @ffff880037949000 (virt) @37949000 (dma) 0x00000c - drop flags
[ 794.100938] xhci_hcd 0000:01:00.0: @ffff880037949004 (virt) @37949004 (dma) 0x000001 - add flags
[ 794.100941] xhci_hcd 0000:01:00.0: @ffff880037949008 (virt) @37949008 (dma) 0x000000 - rsvd2[0]
[ 794.100944] xhci_hcd 0000:01:00.0: @ffff88003794900c (virt) @3794900c (dma) 0x000000 - rsvd2[1]
[ 794.100948] xhci_hcd 0000:01:00.0: @ffff880037949010 (virt) @37949010 (dma) 0x000000 - rsvd2[2]
[ 794.100951] xhci_hcd 0000:01:00.0: @ffff880037949014 (virt) @37949014 (dma) 0x000000 - rsvd2[3]
[ 794.100954] xhci_hcd 0000:01:00.0: @ffff880037949018 (virt) @37949018 (dma) 0x000000 - rsvd2[4]
[ 794.100957] xhci_hcd 0000:01:00.0: @ffff88003794901c (virt) @3794901c (dma) 0x000000 - rsvd2[5]
[ 794.100960] xhci_hcd 0000:01:00.0: Slot Context:
[ 794.100962] xhci_hcd 0000:01:00.0: @ffff880037949020 (virt) @37949020 (dma) 0x8400000 - dev_info
[ 794.100965] xhci_hcd 0000:01:00.0: @ffff880037949024 (virt) @37949024 (dma) 0x010000 - dev_info2
[ 794.100968] xhci_hcd 0000:01:00.0: @ffff880037949028 (virt) @37949028 (dma) 0x000000 - tt_info
[ 794.100972] xhci_hcd 0000:01:00.0: @ffff88003794902c (virt) @3794902c (dma) 0x000000 - dev_state
[ 794.100975] xhci_hcd 0000:01:00.0: @ffff880037949030 (virt) @37949030 (dma) 0x000000 - rsvd[0]
[ 794.100978] xhci_hcd 0000:01:00.0: @ffff880037949034 (virt) @37949034 (dma) 0x000000 - rsvd[1]
[ 794.100981] xhci_hcd 0000:01:00.0: @ffff880037949038 (virt) @37949038 (dma) 0x000000 - rsvd[2]
[ 794.100984] xhci_hcd 0000:01:00.0: @ffff88003794903c (virt) @3794903c (dma) 0x000000 - rsvd[3]
[ 794.100987] xhci_hcd 0000:01:00.0: Endpoint 00 Context:
[ 794.100989] xhci_hcd 0000:01:00.0: @ffff880037949040 (virt) @37949040 (dma) 0x000000 - ep_info
[ 794.100992] xhci_hcd 0000:01:00.0: @ffff880037949044 (virt) @37949044 (dma) 0x2000026 - ep_info2
[ 794.100995] xhci_hcd 0000:01:00.0: @ffff880037949048 (virt) @37949048 (dma) 0xc18403b1 - deq
[ 794.100998] xhci_hcd 0000:01:00.0: @ffff880037949050 (virt) @37949050 (dma) 0x000000 - tx_info
[ 794.101002] xhci_hcd 0000:01:00.0: @ffff880037949054 (virt) @37949054 (dma) 0x000000 - rsvd[0]
[ 794.101005] xhci_hcd 0000:01:00.0: @ffff880037949058 (virt) @37949058 (dma) 0x000000 - rsvd[1]
[ 794.101008] xhci_hcd 0000:01:00.0: @ffff88003794905c (virt) @3794905c (dma) 0x000000 - rsvd[2]
[ 794.101011] xhci_hcd 0000:01:00.0: Endpoint state = 0x1
[ 794.101014] xhci_hcd 0000:01:00.0: Command ring enq = 0x3781b330 (DMA)
[ 794.101017] xhci_hcd 0000:01:00.0: // Ding dong!
[ 794.101019] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c800, 32'h0, 4'hf);
[ 794.101417] xhci_hcd 0000:01:00.0: op reg status = 00000008
[ 794.101420] xhci_hcd 0000:01:00.0: Event ring dequeue ptr:
[ 794.101424] xhci_hcd 0000:01:00.0: @3781b440 3781b320 00000000 01000000 01008400
[ 794.101427] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c024, 32'h8, 4'hf);
[ 794.101429] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 794.101432] xhci_hcd 0000:01:00.0: xhci_handle_event - OS owns TRB
[ 794.101434] xhci_hcd 0000:01:00.0: xhci_handle_event - calling handle_cmd_completion
[ 794.101437] xhci_hcd 0000:01:00.0: Completed config ep cmd
[ 794.101441] xhci_hcd 0000:01:00.0: Command ring deq = 0x3781b330 (DMA)
[ 794.101443] xhci_hcd 0000:01:00.0: xhci_handle_event - returned from handle_cmd_completion
[ 794.101446] xhci_hcd 0000:01:00.0: Event ring deq = 0x3781b450 (DMA)
[ 794.101448] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 794.101453] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 64'hffffc9000064c638, 64'h3781b458, 4'hf);
[ 794.101694] usb 10-1: Successful Endpoint Configure command
[ 794.101697] xhci_hcd 0000:01:00.0: Output context after successful config ep cmd:
[ 794.101700] xhci_hcd 0000:01:00.0: Slot Context:
[ 794.101703] xhci_hcd 0000:01:00.0: @ffff8800c186d000 (virt) @c186d000 (dma) 0x8400000 - dev_info
[ 794.101706] xhci_hcd 0000:01:00.0: @ffff8800c186d004 (virt) @c186d004 (dma) 0x010000 - dev_info2
[ 794.101709] xhci_hcd 0000:01:00.0: @ffff8800c186d008 (virt) @c186d008 (dma) 0x000000 - tt_info
[ 794.101712] xhci_hcd 0000:01:00.0: @ffff8800c186d00c (virt) @c186d00c (dma) 0x10000001 - dev_state
[ 794.101715] xhci_hcd 0000:01:00.0: @ffff8800c186d010 (virt) @c186d010 (dma) 0x000000 - rsvd[0]
[ 794.101719] xhci_hcd 0000:01:00.0: @ffff8800c186d014 (virt) @c186d014 (dma) 0x000000 - rsvd[1]
[ 794.101722] xhci_hcd 0000:01:00.0: @ffff8800c186d018 (virt) @c186d018 (dma) 0x000000 - rsvd[2]
[ 794.101725] xhci_hcd 0000:01:00.0: @ffff8800c186d01c (virt) @c186d01c (dma) 0x000000 - rsvd[3]
[ 794.101727] xhci_hcd 0000:01:00.0: Endpoint 00 Context:
[ 794.101730] xhci_hcd 0000:01:00.0: @ffff8800c186d020 (virt) @c186d020 (dma) 0x000001 - ep_info
[ 794.101733] xhci_hcd 0000:01:00.0: @ffff8800c186d024 (virt) @c186d024 (dma) 0x2000026 - ep_info2
[ 794.101736] xhci_hcd 0000:01:00.0: @ffff8800c186d028 (virt) @c186d028 (dma) 0xc18403b1 - deq
[ 794.101739] xhci_hcd 0000:01:00.0: @ffff8800c186d030 (virt) @c186d030 (dma) 0x000000 - tx_info
[ 794.101742] xhci_hcd 0000:01:00.0: @ffff8800c186d034 (virt) @c186d034 (dma) 0x000000 - rsvd[0]
[ 794.101746] xhci_hcd 0000:01:00.0: @ffff8800c186d038 (virt) @c186d038 (dma) 0x000000 - rsvd[1]
[ 794.101749] xhci_hcd 0000:01:00.0: @ffff8800c186d03c (virt) @c186d03c (dma) 0x000000 - rsvd[2]
[ 794.101752] xhci_hcd 0000:01:00.0: Cached old ring, 5 rings cached
[ 794.101755] xhci_hcd 0000:01:00.0: Cached old ring, 6 rings cached
[ 794.101760] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971660
[ 794.101763] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3500
[ 794.101768] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1839000 (virtual) 0xc1839000 (DMA)
[ 794.101773] xhci_hcd 0000:01:00.0: Linking segment 0xc1839000 to segment 0xc1839000 (DMA)
[ 794.101776] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3500 (virtual), 0xc1839000 (DMA)
[ 794.101779] xhci_hcd 0000:01:00.0: WARN no SS endpoint bMaxBurst
[ 794.101782] xhci_hcd 0000:01:00.0: add ep 0x81, slot id 1, new drop flags = 0x0, new add flags = 0x8, new slot info = 0x18400000
[ 794.101785] xhci_hcd 0000:01:00.0: Allocating ring at ffff8800379711e0
[ 794.101788] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc38e0
[ 794.101791] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1839400 (virtual) 0xc1839400 (DMA)
[ 794.101795] xhci_hcd 0000:01:00.0: Linking segment 0xc1839400 to segment 0xc1839400 (DMA)
[ 794.101798] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc38e0 (virtual), 0xc1839400 (DMA)
[ 794.101801] xhci_hcd 0000:01:00.0: WARN no SS endpoint bMaxBurst
[ 794.101804] xhci_hcd 0000:01:00.0: add ep 0x1, slot id 1, new drop flags = 0x0, new add flags = 0xc, new slot info = 0x18400000
[ 794.101807] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971360
[ 794.101810] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3f80
[ 794.101812] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1839800 (virtual) 0xc1839800 (DMA)
[ 794.101817] xhci_hcd 0000:01:00.0: Linking segment 0xc1839800 to segment 0xc1839800 (DMA)
[ 794.101820] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3f80 (virtual), 0xc1839800 (DMA)
[ 794.101823] xhci_hcd 0000:01:00.0: WARN no SS endpoint bMaxBurst
[ 794.101826] xhci_hcd 0000:01:00.0: add ep 0x82, slot id 1, new drop flags = 0x0, new add flags = 0x2c, new slot info = 0x28400000
[ 794.101829] xhci_hcd 0000:01:00.0: Allocating ring at ffff8800379715a0
[ 794.101831] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3540
[ 794.101837] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c18d4000 (virtual) 0xc18d4000 (DMA)
[ 794.101841] xhci_hcd 0000:01:00.0: Linking segment 0xc18d4000 to segment 0xc18d4000 (DMA)
[ 794.101844] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3540 (virtual), 0xc18d4000 (DMA)
[ 794.101847] xhci_hcd 0000:01:00.0: WARN no SS endpoint bMaxBurst
[ 794.101850] xhci_hcd 0000:01:00.0: add ep 0x2, slot id 1, new drop flags = 0x0, new add flags = 0x3c, new slot info = 0x28400000
[ 794.101853] xhci_hcd 0000:01:00.0: xhci_check_bandwidth called for udev ffff880121b59000
[ 794.101856] xhci_hcd 0000:01:00.0: New Input Control Context:
[ 794.101859] xhci_hcd 0000:01:00.0: @ffff880037949000 (virt) @37949000 (dma) 0x000000 - drop flags
[ 794.101862] xhci_hcd 0000:01:00.0: @ffff880037949004 (virt) @37949004 (dma) 0x00003d - add flags
[ 794.101865] xhci_hcd 0000:01:00.0: @ffff880037949008 (virt) @37949008 (dma) 0x000000 - rsvd2[0]
[ 794.101868] xhci_hcd 0000:01:00.0: @ffff88003794900c (virt) @3794900c (dma) 0x000000 - rsvd2[1]
[ 794.101871] xhci_hcd 0000:01:00.0: @ffff880037949010 (virt) @37949010 (dma) 0x000000 - rsvd2[2]
[ 794.101874] xhci_hcd 0000:01:00.0: @ffff880037949014 (virt) @37949014 (dma) 0x000000 - rsvd2[3]
[ 794.101877] xhci_hcd 0000:01:00.0: @ffff880037949018 (virt) @37949018 (dma) 0x000000 - rsvd2[4]
[ 794.101881] xhci_hcd 0000:01:00.0: @ffff88003794901c (virt) @3794901c (dma) 0x000000 - rsvd2[5]
[ 794.101883] xhci_hcd 0000:01:00.0: Slot Context:
[ 794.101886] xhci_hcd 0000:01:00.0: @ffff880037949020 (virt) @37949020 (dma) 0x28400000 - dev_info
[ 794.101889] xhci_hcd 0000:01:00.0: @ffff880037949024 (virt) @37949024 (dma) 0x010000 - dev_info2
[ 794.101892] xhci_hcd 0000:01:00.0: @ffff880037949028 (virt) @37949028 (dma) 0x000000 - tt_info
[ 794.101895] xhci_hcd 0000:01:00.0: @ffff88003794902c (virt) @3794902c (dma) 0x000000 - dev_state
[ 794.101898] xhci_hcd 0000:01:00.0: @ffff880037949030 (virt) @37949030 (dma) 0x000000 - rsvd[0]
[ 794.101901] xhci_hcd 0000:01:00.0: @ffff880037949034 (virt) @37949034 (dma) 0x000000 - rsvd[1]
[ 794.101904] xhci_hcd 0000:01:00.0: @ffff880037949038 (virt) @37949038 (dma) 0x000000 - rsvd[2]
[ 794.101907] xhci_hcd 0000:01:00.0: @ffff88003794903c (virt) @3794903c (dma) 0x000000 - rsvd[3]
[ 794.101910] xhci_hcd 0000:01:00.0: Endpoint 00 Context:
[ 794.101912] xhci_hcd 0000:01:00.0: @ffff880037949040 (virt) @37949040 (dma) 0x000000 - ep_info
[ 794.101915] xhci_hcd 0000:01:00.0: @ffff880037949044 (virt) @37949044 (dma) 0x2000026 - ep_info2
[ 794.101919] xhci_hcd 0000:01:00.0: @ffff880037949048 (virt) @37949048 (dma) 0xc18403b1 - deq
[ 794.101921] xhci_hcd 0000:01:00.0: @ffff880037949050 (virt) @37949050 (dma) 0x000000 - tx_info
[ 794.101925] xhci_hcd 0000:01:00.0: @ffff880037949054 (virt) @37949054 (dma) 0x000000 - rsvd[0]
[ 794.101928] xhci_hcd 0000:01:00.0: @ffff880037949058 (virt) @37949058 (dma) 0x000000 - rsvd[1]
[ 794.101931] xhci_hcd 0000:01:00.0: @ffff88003794905c (virt) @3794905c (dma) 0x000000 - rsvd[2]
[ 794.101933] xhci_hcd 0000:01:00.0: Endpoint 01 Context:
[ 794.101936] xhci_hcd 0000:01:00.0: @ffff880037949060 (virt) @37949060 (dma) 0x000000 - ep_info
[ 794.101939] xhci_hcd 0000:01:00.0: @ffff880037949064 (virt) @37949064 (dma) 0x4000016 - ep_info2
[ 794.101942] xhci_hcd 0000:01:00.0: @ffff880037949068 (virt) @37949068 (dma) 0xc1839401 - deq
[ 794.101945] xhci_hcd 0000:01:00.0: @ffff880037949070 (virt) @37949070 (dma) 0x000000 - tx_info
[ 794.101948] xhci_hcd 0000:01:00.0: @ffff880037949074 (virt) @37949074 (dma) 0x000000 - rsvd[0]
[ 794.101951] xhci_hcd 0000:01:00.0: @ffff880037949078 (virt) @37949078 (dma) 0x000000 - rsvd[1]
[ 794.101954] xhci_hcd 0000:01:00.0: @ffff88003794907c (virt) @3794907c (dma) 0x000000 - rsvd[2]
[ 794.101957] xhci_hcd 0000:01:00.0: Endpoint 02 Context:
[ 794.101960] xhci_hcd 0000:01:00.0: @ffff880037949080 (virt) @37949080 (dma) 0x000000 - ep_info
[ 794.101963] xhci_hcd 0000:01:00.0: @ffff880037949084 (virt) @37949084 (dma) 0x4000036 - ep_info2
[ 794.101966] xhci_hcd 0000:01:00.0: @ffff880037949088 (virt) @37949088 (dma) 0xc1839001 - deq
[ 794.101969] xhci_hcd 0000:01:00.0: @ffff880037949090 (virt) @37949090 (dma) 0x000000 - tx_info
[ 794.101972] xhci_hcd 0000:01:00.0: @ffff880037949094 (virt) @37949094 (dma) 0x000000 - rsvd[0]
[ 794.101975] xhci_hcd 0000:01:00.0: @ffff880037949098 (virt) @37949098 (dma) 0x000000 - rsvd[1]
[ 794.101978] xhci_hcd 0000:01:00.0: @ffff88003794909c (virt) @3794909c (dma) 0x000000 - rsvd[2]
[ 794.101981] xhci_hcd 0000:01:00.0: Endpoint 03 Context:
[ 794.101983] xhci_hcd 0000:01:00.0: @ffff8800379490a0 (virt) @379490a0 (dma) 0x000000 - ep_info
[ 794.101986] xhci_hcd 0000:01:00.0: @ffff8800379490a4 (virt) @379490a4 (dma) 0x4000016 - ep_info2
[ 794.101989] xhci_hcd 0000:01:00.0: @ffff8800379490a8 (virt) @379490a8 (dma) 0xc18d4001 - deq
[ 794.101992] xhci_hcd 0000:01:00.0: @ffff8800379490b0 (virt) @379490b0 (dma) 0x000000 - tx_info
[ 794.101995] xhci_hcd 0000:01:00.0: @ffff8800379490b4 (virt) @379490b4 (dma) 0x000000 - rsvd[0]
[ 794.101998] xhci_hcd 0000:01:00.0: @ffff8800379490b8 (virt) @379490b8 (dma) 0x000000 - rsvd[1]
[ 794.102001] xhci_hcd 0000:01:00.0: @ffff8800379490bc (virt) @379490bc (dma) 0x000000 - rsvd[2]
[ 794.102004] xhci_hcd 0000:01:00.0: Endpoint 04 Context:
[ 794.102007] xhci_hcd 0000:01:00.0: @ffff8800379490c0 (virt) @379490c0 (dma) 0x000000 - ep_info
[ 794.102010] xhci_hcd 0000:01:00.0: @ffff8800379490c4 (virt) @379490c4 (dma) 0x4000036 - ep_info2
[ 794.102013] xhci_hcd 0000:01:00.0: @ffff8800379490c8 (virt) @379490c8 (dma) 0xc1839801 - deq
[ 794.102016] xhci_hcd 0000:01:00.0: @ffff8800379490d0 (virt) @379490d0 (dma) 0x000000 - tx_info
[ 794.102019] xhci_hcd 0000:01:00.0: @ffff8800379490d4 (virt) @379490d4 (dma) 0x000000 - rsvd[0]
[ 794.102022] xhci_hcd 0000:01:00.0: @ffff8800379490d8 (virt) @379490d8 (dma) 0x000000 - rsvd[1]
[ 794.102025] xhci_hcd 0000:01:00.0: @ffff8800379490dc (virt) @379490dc (dma) 0x000000 - rsvd[2]
[ 794.102028] xhci_hcd 0000:01:00.0: Endpoint state = 0x1
[ 794.102030] xhci_hcd 0000:01:00.0: Command ring enq = 0x3781b340 (DMA)
[ 794.102033] xhci_hcd 0000:01:00.0: // Ding dong!
[ 794.102035] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c800, 32'h0, 4'hf);
[ 794.102365] xhci_hcd 0000:01:00.0: op reg status = 00000008
[ 794.102368] xhci_hcd 0000:01:00.0: Event ring dequeue ptr:
[ 794.102371] xhci_hcd 0000:01:00.0: @3781b450 3781b330 00000000 01000000 01008400
[ 794.102374] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c024, 32'h8, 4'hf);
[ 794.102377] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 794.102379] xhci_hcd 0000:01:00.0: xhci_handle_event - OS owns TRB
[ 794.102381] xhci_hcd 0000:01:00.0: xhci_handle_event - calling handle_cmd_completion
[ 794.102384] xhci_hcd 0000:01:00.0: Completed config ep cmd
[ 794.102388] xhci_hcd 0000:01:00.0: Command ring deq = 0x3781b340 (DMA)
[ 794.102391] xhci_hcd 0000:01:00.0: xhci_handle_event - returned from handle_cmd_completion
[ 794.102393] xhci_hcd 0000:01:00.0: Event ring deq = 0x3781b460 (DMA)
[ 794.102396] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 794.102401] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 64'hffffc9000064c638, 64'h3781b468, 4'hf);
[ 794.102413] usb 10-1: Successful Endpoint Configure command
[ 794.102416] xhci_hcd 0000:01:00.0: Output context after successful config ep cmd:
[ 794.102418] xhci_hcd 0000:01:00.0: Slot Context:
[ 794.102421] xhci_hcd 0000:01:00.0: @ffff8800c186d000 (virt) @c186d000 (dma) 0x28400000 - dev_info
[ 794.102424] xhci_hcd 0000:01:00.0: @ffff8800c186d004 (virt) @c186d004 (dma) 0x010000 - dev_info2
[ 794.102427] xhci_hcd 0000:01:00.0: @ffff8800c186d008 (virt) @c186d008 (dma) 0x000000 - tt_info
[ 794.102430] xhci_hcd 0000:01:00.0: @ffff8800c186d00c (virt) @c186d00c (dma) 0x18000001 - dev_state
[ 794.102434] xhci_hcd 0000:01:00.0: @ffff8800c186d010 (virt) @c186d010 (dma) 0x000000 - rsvd[0]
[ 794.102437] xhci_hcd 0000:01:00.0: @ffff8800c186d014 (virt) @c186d014 (dma) 0x000000 - rsvd[1]
[ 794.102440] xhci_hcd 0000:01:00.0: @ffff8800c186d018 (virt) @c186d018 (dma) 0x000000 - rsvd[2]
[ 794.102443] xhci_hcd 0000:01:00.0: @ffff8800c186d01c (virt) @c186d01c (dma) 0x000000 - rsvd[3]
[ 794.102446] xhci_hcd 0000:01:00.0: Endpoint 00 Context:
[ 794.102448] xhci_hcd 0000:01:00.0: @ffff8800c186d020 (virt) @c186d020 (dma) 0x000001 - ep_info
[ 794.102451] xhci_hcd 0000:01:00.0: @ffff8800c186d024 (virt) @c186d024 (dma) 0x2000026 - ep_info2
[ 794.102454] xhci_hcd 0000:01:00.0: @ffff8800c186d028 (virt) @c186d028 (dma) 0xc18403b1 - deq
[ 794.102457] xhci_hcd 0000:01:00.0: @ffff8800c186d030 (virt) @c186d030 (dma) 0x000000 - tx_info
[ 794.102460] xhci_hcd 0000:01:00.0: @ffff8800c186d034 (virt) @c186d034 (dma) 0x000000 - rsvd[0]
[ 794.102464] xhci_hcd 0000:01:00.0: @ffff8800c186d038 (virt) @c186d038 (dma) 0x000000 - rsvd[1]
[ 794.102467] xhci_hcd 0000:01:00.0: @ffff8800c186d03c (virt) @c186d03c (dma) 0x000000 - rsvd[2]
[ 794.102469] xhci_hcd 0000:01:00.0: Endpoint 01 Context:
[ 794.102472] xhci_hcd 0000:01:00.0: @ffff8800c186d040 (virt) @c186d040 (dma) 0x000001 - ep_info
[ 794.102475] xhci_hcd 0000:01:00.0: @ffff8800c186d044 (virt) @c186d044 (dma) 0x4000016 - ep_info2
[ 794.102478] xhci_hcd 0000:01:00.0: @ffff8800c186d048 (virt) @c186d048 (dma) 0xc1839401 - deq
[ 794.102481] xhci_hcd 0000:01:00.0: @ffff8800c186d050 (virt) @c186d050 (dma) 0x000000 - tx_info
[ 794.102484] xhci_hcd 0000:01:00.0: @ffff8800c186d054 (virt) @c186d054 (dma) 0x000000 - rsvd[0]
[ 794.102487] xhci_hcd 0000:01:00.0: @ffff8800c186d058 (virt) @c186d058 (dma) 0x000000 - rsvd[1]
[ 794.102490] xhci_hcd 0000:01:00.0: @ffff8800c186d05c (virt) @c186d05c (dma) 0x000000 - rsvd[2]
[ 794.102493] xhci_hcd 0000:01:00.0: Endpoint 02 Context:
[ 794.102495] xhci_hcd 0000:01:00.0: @ffff8800c186d060 (virt) @c186d060 (dma) 0x000001 - ep_info
[ 794.102498] xhci_hcd 0000:01:00.0: @ffff8800c186d064 (virt) @c186d064 (dma) 0x4000036 - ep_info2
[ 794.102502] xhci_hcd 0000:01:00.0: @ffff8800c186d068 (virt) @c186d068 (dma) 0xc1839001 - deq
[ 794.102505] xhci_hcd 0000:01:00.0: @ffff8800c186d070 (virt) @c186d070 (dma) 0x000000 - tx_info
[ 794.102508] xhci_hcd 0000:01:00.0: @ffff8800c186d074 (virt) @c186d074 (dma) 0x000000 - rsvd[0]
[ 794.102511] xhci_hcd 0000:01:00.0: @ffff8800c186d078 (virt) @c186d078 (dma) 0x000000 - rsvd[1]
[ 794.102514] xhci_hcd 0000:01:00.0: @ffff8800c186d07c (virt) @c186d07c (dma) 0x000000 - rsvd[2]
[ 794.102516] xhci_hcd 0000:01:00.0: Endpoint 03 Context:
[ 794.102519] xhci_hcd 0000:01:00.0: @ffff8800c186d080 (virt) @c186d080 (dma) 0x000001 - ep_info
[ 794.102522] xhci_hcd 0000:01:00.0: @ffff8800c186d084 (virt) @c186d084 (dma) 0x4000016 - ep_info2
[ 794.102525] xhci_hcd 0000:01:00.0: @ffff8800c186d088 (virt) @c186d088 (dma) 0xc18d4001 - deq
[ 794.102528] xhci_hcd 0000:01:00.0: @ffff8800c186d090 (virt) @c186d090 (dma) 0x000000 - tx_info
[ 794.102531] xhci_hcd 0000:01:00.0: @ffff8800c186d094 (virt) @c186d094 (dma) 0x000000 - rsvd[0]
[ 794.102534] xhci_hcd 0000:01:00.0: @ffff8800c186d098 (virt) @c186d098 (dma) 0x000000 - rsvd[1]
[ 794.102537] xhci_hcd 0000:01:00.0: @ffff8800c186d09c (virt) @c186d09c (dma) 0x000000 - rsvd[2]
[ 794.102540] xhci_hcd 0000:01:00.0: Endpoint 04 Context:
[ 794.102542] xhci_hcd 0000:01:00.0: @ffff8800c186d0a0 (virt) @c186d0a0 (dma) 0x000001 - ep_info
[ 794.102545] xhci_hcd 0000:01:00.0: @ffff8800c186d0a4 (virt) @c186d0a4 (dma) 0x4000036 - ep_info2
[ 794.102549] xhci_hcd 0000:01:00.0: @ffff8800c186d0a8 (virt) @c186d0a8 (dma) 0xc1839801 - deq
[ 794.102552] xhci_hcd 0000:01:00.0: @ffff8800c186d0b0 (virt) @c186d0b0 (dma) 0x000000 - tx_info
[ 794.102555] xhci_hcd 0000:01:00.0: @ffff8800c186d0b4 (virt) @c186d0b4 (dma) 0x000000 - rsvd[0]
[ 794.102558] xhci_hcd 0000:01:00.0: @ffff8800c186d0b8 (virt) @c186d0b8 (dma) 0x000000 - rsvd[1]
[ 794.102561] xhci_hcd 0000:01:00.0: @ffff8800c186d0bc (virt) @c186d0bc (dma) 0x000000 - rsvd[2]
[ 794.102568] xhci_hcd 0000:01:00.0: Queueing ctrl tx for slot id 1, ep 0
[ 794.102570] xhci_hcd 0000:01:00.0: Endpoint state = 0x1
[ 794.102573] xhci_hcd 0000:01:00.0: Ring enq = 0xc1840110 (DMA)
[ 794.102576] xhci_hcd 0000:01:00.0: Ring enq = 0xc1840120 (DMA)
[ 794.102579] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c804, 32'h1, 4'hf);
[ 794.102864] xhci_hcd 0000:01:00.0: op reg status = 00000008
[ 794.102867] xhci_hcd 0000:01:00.0: Event ring dequeue ptr:
[ 794.102870] xhci_hcd 0000:01:00.0: @3781b460 c1840110 00000000 01000000 01018000
[ 794.102874] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c024, 32'h8, 4'hf);
[ 794.102876] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 794.102879] xhci_hcd 0000:01:00.0: xhci_handle_event - OS owns TRB
[ 794.102881] xhci_hcd 0000:01:00.0: xhci_handle_event - calling handle_tx_event
[ 794.102884] xhci_hcd 0000:01:00.0: handle_tx_event - ep index = 0
[ 794.102887] xhci_hcd 0000:01:00.0: DMA address or buffer contents= 3246653712
[ 794.102890] xhci_hcd 0000:01:00.0: Successful control transfer!
[ 794.102893] xhci_hcd 0000:01:00.0: Ring deq = 0xc1840110 (DMA)
[ 794.102895] xhci_hcd 0000:01:00.0: Ring deq = 0xc1840120 (DMA)
[ 794.102898] xhci_hcd 0000:01:00.0: Event ring deq = 0x3781b470 (DMA)
[ 794.102901] xhci_hcd 0000:01:00.0: Giveback URB ffff880122679000, len = 0, status = 0
[ 794.102906] xhci_hcd 0000:01:00.0: xhci_handle_event - returned from handle_tx_event
[ 794.102908] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 794.102913] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 64'hffffc9000064c638, 64'h3781b478, 4'hf);
[ 794.102919] xhci_hcd 0000:01:00.0: Endpoint 0x81 not halted, refusing to reset.
[ 794.102922] xhci_hcd 0000:01:00.0: Endpoint 0x1 not halted, refusing to reset.
[ 794.102924] xhci_hcd 0000:01:00.0: Endpoint 0x82 not halted, refusing to reset.
[ 794.102927] xhci_hcd 0000:01:00.0: Endpoint 0x2 not halted, refusing to reset.
[ 794.102933] usb 10-1: adding 10-1:2.0 (config #2, interface 0)
[ 794.102969] libusual 10-1:2.0: usb_probe_interface
[ 794.102972] libusual 10-1:2.0: usb_probe_interface - got id
[ 794.103011] uas 10-1:2.0: usb_probe_interface
[ 794.103013] uas 10-1:2.0: usb_probe_interface - got id
[ 794.104920] Initializing USB Mass Storage driver...
[ 794.106383] scsi8 : uas
[ 794.106440] xhci_hcd 0000:01:00.0: Driver wants 257 stream IDs (including stream 0).
[ 794.106448] xhci_hcd 0000:01:00.0: xHCI HW only supports 32 stream ctx entries.
[ 794.106451] xhci_hcd 0000:01:00.0: Need 32 stream ctx entries for 32 stream IDs.
[ 794.106454] xhci_hcd 0000:01:00.0: Allocating 32 streams and 32 stream context array entries.
[ 794.106460] xhci_hcd 0000:01:00.0: Allocating ring at ffff8800379713c0
[ 794.106463] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc37e0
[ 794.106466] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c18d4400 (virtual) 0xc18d4400 (DMA)
[ 794.106471] xhci_hcd 0000:01:00.0: Linking segment 0xc18d4400 to segment 0xc18d4400 (DMA)
[ 794.106474] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc37e0 (virtual), 0xc18d4400 (DMA)
[ 794.106477] xhci_hcd 0000:01:00.0: Setting stream 1 ring ptr to 0xc18d4403
[ 794.106481] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971240
[ 794.106484] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3d80
[ 794.106487] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c18d4800 (virtual) 0xc18d4800 (DMA)
[ 794.106491] xhci_hcd 0000:01:00.0: Linking segment 0xc18d4800 to segment 0xc18d4800 (DMA)
[ 794.106494] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3d80 (virtual), 0xc18d4800 (DMA)
[ 794.106497] xhci_hcd 0000:01:00.0: Setting stream 2 ring ptr to 0xc18d4803
[ 794.106500] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971180
[ 794.106502] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc37a0
[ 794.106506] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037a6d000 (virtual) 0x37a6d000 (DMA)
[ 794.106511] xhci_hcd 0000:01:00.0: Linking segment 0x37a6d000 to segment 0x37a6d000 (DMA)
[ 794.106514] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc37a0 (virtual), 0x37a6d000 (DMA)
[ 794.106517] xhci_hcd 0000:01:00.0: Setting stream 3 ring ptr to 0x37a6d003
[ 794.106520] xhci_hcd 0000:01:00.0: Allocating ring at ffff8800379710c0
[ 794.106522] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc37c0
[ 794.106525] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037a6d400 (virtual) 0x37a6d400 (DMA)
[ 794.106529] xhci_hcd 0000:01:00.0: Linking segment 0x37a6d400 to segment 0x37a6d400 (DMA)
[ 794.106532] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc37c0 (virtual), 0x37a6d400 (DMA)
[ 794.106535] xhci_hcd 0000:01:00.0: Setting stream 4 ring ptr to 0x37a6d403
[ 794.106538] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971840
[ 794.106541] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3dc0
[ 794.106543] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037a6d800 (virtual) 0x37a6d800 (DMA)
[ 794.106548] xhci_hcd 0000:01:00.0: Linking segment 0x37a6d800 to segment 0x37a6d800 (DMA)
[ 794.106551] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3dc0 (virtual), 0x37a6d800 (DMA)
[ 794.106554] xhci_hcd 0000:01:00.0: Setting stream 5 ring ptr to 0x37a6d803
[ 794.106556] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971d80
[ 794.106559] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3440
[ 794.106563] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c180a000 (virtual) 0xc180a000 (DMA)
[ 794.106567] xhci_hcd 0000:01:00.0: Linking segment 0xc180a000 to segment 0xc180a000 (DMA)
[ 794.106570] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3440 (virtual), 0xc180a000 (DMA)
[ 794.106573] xhci_hcd 0000:01:00.0: Setting stream 6 ring ptr to 0xc180a003
[ 794.106576] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971d20
[ 794.106578] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3ea0
[ 794.106581] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c180a400 (virtual) 0xc180a400 (DMA)
[ 794.106585] xhci_hcd 0000:01:00.0: Linking segment 0xc180a400 to segment 0xc180a400 (DMA)
[ 794.106588] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3ea0 (virtual), 0xc180a400 (DMA)
[ 794.106592] xhci_hcd 0000:01:00.0: Setting stream 7 ring ptr to 0xc180a403
[ 794.106594] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971cc0
[ 794.106597] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3f40
[ 794.106600] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c180a800 (virtual) 0xc180a800 (DMA)
[ 794.106604] xhci_hcd 0000:01:00.0: Linking segment 0xc180a800 to segment 0xc180a800 (DMA)
[ 794.106607] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3f40 (virtual), 0xc180a800 (DMA)
[ 794.106610] xhci_hcd 0000:01:00.0: Setting stream 8 ring ptr to 0xc180a803
[ 794.106613] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971c60
[ 794.106615] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc30e0
[ 794.106619] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037a0f000 (virtual) 0x37a0f000 (DMA)
[ 794.106624] xhci_hcd 0000:01:00.0: Linking segment 0x37a0f000 to segment 0x37a0f000 (DMA)
[ 794.106627] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc30e0 (virtual), 0x37a0f000 (DMA)
[ 794.106630] xhci_hcd 0000:01:00.0: Setting stream 9 ring ptr to 0x37a0f003
[ 794.106632] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971ba0
[ 794.106635] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3780
[ 794.106638] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037a0f400 (virtual) 0x37a0f400 (DMA)
[ 794.106642] xhci_hcd 0000:01:00.0: Linking segment 0x37a0f400 to segment 0x37a0f400 (DMA)
[ 794.106645] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3780 (virtual), 0x37a0f400 (DMA)
[ 794.106648] xhci_hcd 0000:01:00.0: Setting stream 10 ring ptr to 0x37a0f403
[ 794.106651] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971c00
[ 794.106653] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3ec0
[ 794.106656] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037a0f800 (virtual) 0x37a0f800 (DMA)
[ 794.106660] xhci_hcd 0000:01:00.0: Linking segment 0x37a0f800 to segment 0x37a0f800 (DMA)
[ 794.106663] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3ec0 (virtual), 0x37a0f800 (DMA)
[ 794.106666] xhci_hcd 0000:01:00.0: Setting stream 11 ring ptr to 0x37a0f803
[ 794.106669] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971540
[ 794.106672] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3720
[ 794.106676] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1835000 (virtual) 0xc1835000 (DMA)
[ 794.106680] xhci_hcd 0000:01:00.0: Linking segment 0xc1835000 to segment 0xc1835000 (DMA)
[ 794.106683] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3720 (virtual), 0xc1835000 (DMA)
[ 794.106686] xhci_hcd 0000:01:00.0: Setting stream 12 ring ptr to 0xc1835003
[ 794.106689] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971f60
[ 794.106691] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3700
[ 794.106694] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1835400 (virtual) 0xc1835400 (DMA)
[ 794.106699] xhci_hcd 0000:01:00.0: Linking segment 0xc1835400 to segment 0xc1835400 (DMA)
[ 794.106702] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3700 (virtual), 0xc1835400 (DMA)
[ 794.106705] xhci_hcd 0000:01:00.0: Setting stream 13 ring ptr to 0xc1835403
[ 794.106707] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971e40
[ 794.106710] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3020
[ 794.106713] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1835800 (virtual) 0xc1835800 (DMA)
[ 794.106717] xhci_hcd 0000:01:00.0: Linking segment 0xc1835800 to segment 0xc1835800 (DMA)
[ 794.106720] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3020 (virtual), 0xc1835800 (DMA)
[ 794.106723] xhci_hcd 0000:01:00.0: Setting stream 14 ring ptr to 0xc1835803
[ 794.106726] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971de0
[ 794.106728] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3760
[ 794.106732] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037a43000 (virtual) 0x37a43000 (DMA)
[ 794.106736] xhci_hcd 0000:01:00.0: Linking segment 0x37a43000 to segment 0x37a43000 (DMA)
[ 794.106739] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3760 (virtual), 0x37a43000 (DMA)
[ 794.106742] xhci_hcd 0000:01:00.0: Setting stream 15 ring ptr to 0x37a43003
[ 794.106745] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971f00
[ 794.106747] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3040
[ 794.106750] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037a43400 (virtual) 0x37a43400 (DMA)
[ 794.106755] xhci_hcd 0000:01:00.0: Linking segment 0x37a43400 to segment 0x37a43400 (DMA)
[ 794.106758] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3040 (virtual), 0x37a43400 (DMA)
[ 794.106761] xhci_hcd 0000:01:00.0: Setting stream 16 ring ptr to 0x37a43403
[ 794.106763] xhci_hcd 0000:01:00.0: Allocating ring at ffff8800379717e0
[ 794.106766] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3080
[ 794.106769] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037a43800 (virtual) 0x37a43800 (DMA)
[ 794.106773] xhci_hcd 0000:01:00.0: Linking segment 0x37a43800 to segment 0x37a43800 (DMA)
[ 794.106776] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3080 (virtual), 0x37a43800 (DMA)
[ 794.106779] xhci_hcd 0000:01:00.0: Setting stream 17 ring ptr to 0x37a43803
[ 794.106781] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971ea0
[ 794.106784] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3160
[ 794.106788] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c188d000 (virtual) 0xc188d000 (DMA)
[ 794.106792] xhci_hcd 0000:01:00.0: Linking segment 0xc188d000 to segment 0xc188d000 (DMA)
[ 794.106795] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3160 (virtual), 0xc188d000 (DMA)
[ 794.106798] xhci_hcd 0000:01:00.0: Setting stream 18 ring ptr to 0xc188d003
[ 794.106801] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971780
[ 794.106804] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3100
[ 794.106806] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c188d400 (virtual) 0xc188d400 (DMA)
[ 794.106811] xhci_hcd 0000:01:00.0: Linking segment 0xc188d400 to segment 0xc188d400 (DMA)
[ 794.106814] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3100 (virtual), 0xc188d400 (DMA)
[ 794.106817] xhci_hcd 0000:01:00.0: Setting stream 19 ring ptr to 0xc188d403
[ 794.106819] xhci_hcd 0000:01:00.0: Allocating ring at ffff8800379716c0
[ 794.106822] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc31a0
[ 794.106825] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c188d800 (virtual) 0xc188d800 (DMA)
[ 794.106829] xhci_hcd 0000:01:00.0: Linking segment 0xc188d800 to segment 0xc188d800 (DMA)
[ 794.106832] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc31a0 (virtual), 0xc188d800 (DMA)
[ 794.106835] xhci_hcd 0000:01:00.0: Setting stream 20 ring ptr to 0xc188d803
[ 794.106838] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971720
[ 794.106840] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc31e0
[ 794.106844] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800379de000 (virtual) 0x379de000 (DMA)
[ 794.106848] xhci_hcd 0000:01:00.0: Linking segment 0x379de000 to segment 0x379de000 (DMA)
[ 794.106851] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc31e0 (virtual), 0x379de000 (DMA)
[ 794.106854] xhci_hcd 0000:01:00.0: Setting stream 21 ring ptr to 0x379de003
[ 794.106857] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971b40
[ 794.106860] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3c00
[ 794.106863] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800379de400 (virtual) 0x379de400 (DMA)
[ 794.106867] xhci_hcd 0000:01:00.0: Linking segment 0x379de400 to segment 0x379de400 (DMA)
[ 794.106870] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3c00 (virtual), 0x379de400 (DMA)
[ 794.106873] xhci_hcd 0000:01:00.0: Setting stream 22 ring ptr to 0x379de403
[ 794.106875] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971ae0
[ 794.106878] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc30a0
[ 794.106881] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800379de800 (virtual) 0x379de800 (DMA)
[ 794.106885] xhci_hcd 0000:01:00.0: Linking segment 0x379de800 to segment 0x379de800 (DMA)
[ 794.106888] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc30a0 (virtual), 0x379de800 (DMA)
[ 794.106891] xhci_hcd 0000:01:00.0: Setting stream 23 ring ptr to 0x379de803
[ 794.106894] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971a80
[ 794.106896] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3200
[ 794.106900] xhci_hcd 0000:01:00.0: // Allocating segment at ffff88003789b000 (virtual) 0x3789b000 (DMA)
[ 794.106904] xhci_hcd 0000:01:00.0: Linking segment 0x3789b000 to segment 0x3789b000 (DMA)
[ 794.106907] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3200 (virtual), 0x3789b000 (DMA)
[ 794.106911] xhci_hcd 0000:01:00.0: Setting stream 24 ring ptr to 0x3789b003
[ 794.106913] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971a20
[ 794.106916] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3600
[ 794.106919] xhci_hcd 0000:01:00.0: // Allocating segment at ffff88003789b400 (virtual) 0x3789b400 (DMA)
[ 794.106923] xhci_hcd 0000:01:00.0: Linking segment 0x3789b400 to segment 0x3789b400 (DMA)
[ 794.106926] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3600 (virtual), 0x3789b400 (DMA)
[ 794.106929] xhci_hcd 0000:01:00.0: Setting stream 25 ring ptr to 0x3789b403
[ 794.106932] xhci_hcd 0000:01:00.0: Allocating ring at ffff8800379719c0
[ 794.106934] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3380
[ 794.106937] xhci_hcd 0000:01:00.0: // Allocating segment at ffff88003789b800 (virtual) 0x3789b800 (DMA)
[ 794.106941] xhci_hcd 0000:01:00.0: Linking segment 0x3789b800 to segment 0x3789b800 (DMA)
[ 794.106944] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3380 (virtual), 0x3789b800 (DMA)
[ 794.106947] xhci_hcd 0000:01:00.0: Setting stream 26 ring ptr to 0x3789b803
[ 794.106950] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971120
[ 794.106952] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3620
[ 794.106956] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c189d000 (virtual) 0xc189d000 (DMA)
[ 794.106960] xhci_hcd 0000:01:00.0: Linking segment 0xc189d000 to segment 0xc189d000 (DMA)
[ 794.106963] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3620 (virtual), 0xc189d000 (DMA)
[ 794.106966] xhci_hcd 0000:01:00.0: Setting stream 27 ring ptr to 0xc189d003
[ 794.106969] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971960
[ 794.106971] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3000
[ 794.106974] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c189d400 (virtual) 0xc189d400 (DMA)
[ 794.106979] xhci_hcd 0000:01:00.0: Linking segment 0xc189d400 to segment 0xc189d400 (DMA)
[ 794.106981] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3000 (virtual), 0xc189d400 (DMA)
[ 794.106985] xhci_hcd 0000:01:00.0: Setting stream 28 ring ptr to 0xc189d403
[ 794.106987] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971420
[ 794.106990] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3bc0
[ 794.106993] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c189d800 (virtual) 0xc189d800 (DMA)
[ 794.106997] xhci_hcd 0000:01:00.0: Linking segment 0xc189d800 to segment 0xc189d800 (DMA)
[ 794.107000] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3bc0 (virtual), 0xc189d800 (DMA)
[ 794.107003] xhci_hcd 0000:01:00.0: Setting stream 29 ring ptr to 0xc189d803
[ 794.107005] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971600
[ 794.107008] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3640
[ 794.107012] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1821000 (virtual) 0xc1821000 (DMA)
[ 794.107016] xhci_hcd 0000:01:00.0: Linking segment 0xc1821000 to segment 0xc1821000 (DMA)
[ 794.107019] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3640 (virtual), 0xc1821000 (DMA)
[ 794.107022] xhci_hcd 0000:01:00.0: Setting stream 30 ring ptr to 0xc1821003
[ 794.107025] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971300
[ 794.107027] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3c20
[ 794.107030] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1821400 (virtual) 0xc1821400 (DMA)
[ 794.107034] xhci_hcd 0000:01:00.0: Linking segment 0xc1821400 to segment 0xc1821400 (DMA)
[ 794.107037] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3c20 (virtual), 0xc1821400 (DMA)
[ 794.107040] xhci_hcd 0000:01:00.0: Setting stream 31 ring ptr to 0xc1821403
[ 794.107073] xhci_hcd 0000:01:00.0: Allocating 32 streams and 32 stream context array entries.
[ 794.107077] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037971060
[ 794.107080] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3320
[ 794.107083] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1821800 (virtual) 0xc1821800 (DMA)
[ 794.107087] xhci_hcd 0000:01:00.0: Linking segment 0xc1821800 to segment 0xc1821800 (DMA)
[ 794.107090] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3320 (virtual), 0xc1821800 (DMA)
[ 794.107093] xhci_hcd 0000:01:00.0: Setting stream 1 ring ptr to 0xc1821803
[ 794.107096] xhci_hcd 0000:01:00.0: Allocating ring at ffff8800379712a0
[ 794.107099] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc35c0
[ 794.107103] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037b61000 (virtual) 0x37b61000 (DMA)
[ 794.107108] xhci_hcd 0000:01:00.0: Linking segment 0x37b61000 to segment 0x37b61000 (DMA)
[ 794.107110] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc35c0 (virtual), 0x37b61000 (DMA)
[ 794.107114] xhci_hcd 0000:01:00.0: Setting stream 2 ring ptr to 0x37b61003
[ 794.107117] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7960
[ 794.107119] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3480
[ 794.107122] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037b61400 (virtual) 0x37b61400 (DMA)
[ 794.107127] xhci_hcd 0000:01:00.0: Linking segment 0x37b61400 to segment 0x37b61400 (DMA)
[ 794.107130] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3480 (virtual), 0x37b61400 (DMA)
[ 794.107133] xhci_hcd 0000:01:00.0: Setting stream 3 ring ptr to 0x37b61403
[ 794.107135] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac79c0
[ 794.107138] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3660
[ 794.107141] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037b61800 (virtual) 0x37b61800 (DMA)
[ 794.107145] xhci_hcd 0000:01:00.0: Linking segment 0x37b61800 to segment 0x37b61800 (DMA)
[ 794.107148] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3660 (virtual), 0x37b61800 (DMA)
[ 794.107151] xhci_hcd 0000:01:00.0: Setting stream 4 ring ptr to 0x37b61803
[ 794.107153] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7a20
[ 794.107156] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3c40
[ 794.107160] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c18ce000 (virtual) 0xc18ce000 (DMA)
[ 794.107164] xhci_hcd 0000:01:00.0: Linking segment 0xc18ce000 to segment 0xc18ce000 (DMA)
[ 794.107167] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3c40 (virtual), 0xc18ce000 (DMA)
[ 794.107170] xhci_hcd 0000:01:00.0: Setting stream 5 ring ptr to 0xc18ce003
[ 794.107173] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7a80
[ 794.107176] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3220
[ 794.107179] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c18ce400 (virtual) 0xc18ce400 (DMA)
[ 794.107183] xhci_hcd 0000:01:00.0: Linking segment 0xc18ce400 to segment 0xc18ce400 (DMA)
[ 794.107186] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3220 (virtual), 0xc18ce400 (DMA)
[ 794.107189] xhci_hcd 0000:01:00.0: Setting stream 6 ring ptr to 0xc18ce403
[ 794.107191] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7b40
[ 794.107194] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3280
[ 794.107197] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c18ce800 (virtual) 0xc18ce800 (DMA)
[ 794.107201] xhci_hcd 0000:01:00.0: Linking segment 0xc18ce800 to segment 0xc18ce800 (DMA)
[ 794.107204] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3280 (virtual), 0xc18ce800 (DMA)
[ 794.107207] xhci_hcd 0000:01:00.0: Setting stream 7 ring ptr to 0xc18ce803
[ 794.107210] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7ba0
[ 794.107212] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3420
[ 794.107216] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037a01000 (virtual) 0x37a01000 (DMA)
[ 794.107221] xhci_hcd 0000:01:00.0: Linking segment 0x37a01000 to segment 0x37a01000 (DMA)
[ 794.107224] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3420 (virtual), 0x37a01000 (DMA)
[ 794.107227] xhci_hcd 0000:01:00.0: Setting stream 8 ring ptr to 0x37a01003
[ 794.107229] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7c00
[ 794.107232] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3460
[ 794.107235] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037a01400 (virtual) 0x37a01400 (DMA)
[ 794.107239] xhci_hcd 0000:01:00.0: Linking segment 0x37a01400 to segment 0x37a01400 (DMA)
[ 794.107242] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3460 (virtual), 0x37a01400 (DMA)
[ 794.107245] xhci_hcd 0000:01:00.0: Setting stream 9 ring ptr to 0x37a01403
[ 794.107247] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7c60
[ 794.107250] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc33a0
[ 794.107253] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037a01800 (virtual) 0x37a01800 (DMA)
[ 794.107257] xhci_hcd 0000:01:00.0: Linking segment 0x37a01800 to segment 0x37a01800 (DMA)
[ 794.107260] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc33a0 (virtual), 0x37a01800 (DMA)
[ 794.107263] xhci_hcd 0000:01:00.0: Setting stream 10 ring ptr to 0x37a01803
[ 794.107266] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7cc0
[ 794.107268] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3300
[ 794.107272] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c181d000 (virtual) 0xc181d000 (DMA)
[ 794.107277] xhci_hcd 0000:01:00.0: Linking segment 0xc181d000 to segment 0xc181d000 (DMA)
[ 794.107280] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3300 (virtual), 0xc181d000 (DMA)
[ 794.107283] xhci_hcd 0000:01:00.0: Setting stream 11 ring ptr to 0xc181d003
[ 794.107285] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7d20
[ 794.107288] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3260
[ 794.107291] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c181d400 (virtual) 0xc181d400 (DMA)
[ 794.107295] xhci_hcd 0000:01:00.0: Linking segment 0xc181d400 to segment 0xc181d400 (DMA)
[ 794.107298] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3260 (virtual), 0xc181d400 (DMA)
[ 794.107301] xhci_hcd 0000:01:00.0: Setting stream 12 ring ptr to 0xc181d403
[ 794.107303] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7d80
[ 794.107306] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc32c0
[ 794.107309] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c181d800 (virtual) 0xc181d800 (DMA)
[ 794.107313] xhci_hcd 0000:01:00.0: Linking segment 0xc181d800 to segment 0xc181d800 (DMA)
[ 794.107316] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc32c0 (virtual), 0xc181d800 (DMA)
[ 794.107319] xhci_hcd 0000:01:00.0: Setting stream 13 ring ptr to 0xc181d803
[ 794.107322] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7de0
[ 794.107324] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc32e0
[ 794.107328] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037b30000 (virtual) 0x37b30000 (DMA)
[ 794.107332] xhci_hcd 0000:01:00.0: Linking segment 0x37b30000 to segment 0x37b30000 (DMA)
[ 794.107335] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc32e0 (virtual), 0x37b30000 (DMA)
[ 794.107338] xhci_hcd 0000:01:00.0: Setting stream 14 ring ptr to 0x37b30003
[ 794.107341] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7e40
[ 794.107344] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3840
[ 794.107347] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037b30400 (virtual) 0x37b30400 (DMA)
[ 794.107351] xhci_hcd 0000:01:00.0: Linking segment 0x37b30400 to segment 0x37b30400 (DMA)
[ 794.107354] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3840 (virtual), 0x37b30400 (DMA)
[ 794.107357] xhci_hcd 0000:01:00.0: Setting stream 15 ring ptr to 0x37b30403
[ 794.107360] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac75a0
[ 794.107362] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc32a0
[ 794.107365] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037b30800 (virtual) 0x37b30800 (DMA)
[ 794.107369] xhci_hcd 0000:01:00.0: Linking segment 0x37b30800 to segment 0x37b30800 (DMA)
[ 794.107372] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc32a0 (virtual), 0x37b30800 (DMA)
[ 794.107375] xhci_hcd 0000:01:00.0: Setting stream 16 ring ptr to 0x37b30803
[ 794.107378] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7f00
[ 794.107380] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3360
[ 794.107387] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037b26000 (virtual) 0x37b26000 (DMA)
[ 794.107392] xhci_hcd 0000:01:00.0: Linking segment 0x37b26000 to segment 0x37b26000 (DMA)
[ 794.107395] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3360 (virtual), 0x37b26000 (DMA)
[ 794.107398] xhci_hcd 0000:01:00.0: Setting stream 17 ring ptr to 0x37b26003
[ 794.107400] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac72a0
[ 794.107403] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc38a0
[ 794.107406] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037b26400 (virtual) 0x37b26400 (DMA)
[ 794.107410] xhci_hcd 0000:01:00.0: Linking segment 0x37b26400 to segment 0x37b26400 (DMA)
[ 794.107413] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc38a0 (virtual), 0x37b26400 (DMA)
[ 794.107416] xhci_hcd 0000:01:00.0: Setting stream 18 ring ptr to 0x37b26403
[ 794.107419] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7660
[ 794.107422] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc33c0
[ 794.107424] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037b26800 (virtual) 0x37b26800 (DMA)
[ 794.107429] xhci_hcd 0000:01:00.0: Linking segment 0x37b26800 to segment 0x37b26800 (DMA)
[ 794.107432] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc33c0 (virtual), 0x37b26800 (DMA)
[ 794.107435] xhci_hcd 0000:01:00.0: Setting stream 19 ring ptr to 0x37b26803
[ 794.107437] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7300
[ 794.107440] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3e80
[ 794.107444] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1868000 (virtual) 0xc1868000 (DMA)
[ 794.107449] xhci_hcd 0000:01:00.0: Linking segment 0xc1868000 to segment 0xc1868000 (DMA)
[ 794.107452] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3e80 (virtual), 0xc1868000 (DMA)
[ 794.107456] xhci_hcd 0000:01:00.0: Setting stream 20 ring ptr to 0xc1868003
[ 794.107458] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7360
[ 794.107461] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3e20
[ 794.107464] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1868400 (virtual) 0xc1868400 (DMA)
[ 794.107468] xhci_hcd 0000:01:00.0: Linking segment 0xc1868400 to segment 0xc1868400 (DMA)
[ 794.107471] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3e20 (virtual), 0xc1868400 (DMA)
[ 794.107474] xhci_hcd 0000:01:00.0: Setting stream 21 ring ptr to 0xc1868403
[ 794.107477] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac76c0
[ 794.107479] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3ae0
[ 794.107482] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1868800 (virtual) 0xc1868800 (DMA)
[ 794.107486] xhci_hcd 0000:01:00.0: Linking segment 0xc1868800 to segment 0xc1868800 (DMA)
[ 794.107489] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3ae0 (virtual), 0xc1868800 (DMA)
[ 794.107492] xhci_hcd 0000:01:00.0: Setting stream 22 ring ptr to 0xc1868803
[ 794.107495] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7720
[ 794.107497] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3ba0
[ 794.107501] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037ba2000 (virtual) 0x37ba2000 (DMA)
[ 794.107506] xhci_hcd 0000:01:00.0: Linking segment 0x37ba2000 to segment 0x37ba2000 (DMA)
[ 794.107509] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3ba0 (virtual), 0x37ba2000 (DMA)
[ 794.107512] xhci_hcd 0000:01:00.0: Setting stream 23 ring ptr to 0x37ba2003
[ 794.107515] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7780
[ 794.107518] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3560
[ 794.107521] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037ba2400 (virtual) 0x37ba2400 (DMA)
[ 794.107525] xhci_hcd 0000:01:00.0: Linking segment 0x37ba2400 to segment 0x37ba2400 (DMA)
[ 794.107528] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3560 (virtual), 0x37ba2400 (DMA)
[ 794.107531] xhci_hcd 0000:01:00.0: Setting stream 24 ring ptr to 0x37ba2403
[ 794.107534] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7000
[ 794.107536] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3aa0
[ 794.107539] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037ba2800 (virtual) 0x37ba2800 (DMA)
[ 794.107543] xhci_hcd 0000:01:00.0: Linking segment 0x37ba2800 to segment 0x37ba2800 (DMA)
[ 794.107546] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3aa0 (virtual), 0x37ba2800 (DMA)
[ 794.107549] xhci_hcd 0000:01:00.0: Setting stream 25 ring ptr to 0x37ba2803
[ 794.107552] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7060
[ 794.107554] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3400
[ 794.107559] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1896000 (virtual) 0xc1896000 (DMA)
[ 794.107563] xhci_hcd 0000:01:00.0: Linking segment 0xc1896000 to segment 0xc1896000 (DMA)
[ 794.107566] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3400 (virtual), 0xc1896000 (DMA)
[ 794.107569] xhci_hcd 0000:01:00.0: Setting stream 26 ring ptr to 0xc1896003
[ 794.107572] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac70c0
[ 794.107574] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3940
[ 794.107577] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1896400 (virtual) 0xc1896400 (DMA)
[ 794.107582] xhci_hcd 0000:01:00.0: Linking segment 0xc1896400 to segment 0xc1896400 (DMA)
[ 794.107584] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3940 (virtual), 0xc1896400 (DMA)
[ 794.107588] xhci_hcd 0000:01:00.0: Setting stream 27 ring ptr to 0xc1896403
[ 794.107590] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7120
[ 794.107593] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3960
[ 794.107596] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1896800 (virtual) 0xc1896800 (DMA)
[ 794.107600] xhci_hcd 0000:01:00.0: Linking segment 0xc1896800 to segment 0xc1896800 (DMA)
[ 794.107603] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3960 (virtual), 0xc1896800 (DMA)
[ 794.107606] xhci_hcd 0000:01:00.0: Setting stream 28 ring ptr to 0xc1896803
[ 794.107608] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac73c0
[ 794.107611] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3fc0
[ 794.107615] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037857000 (virtual) 0x37857000 (DMA)
[ 794.107619] xhci_hcd 0000:01:00.0: Linking segment 0x37857000 to segment 0x37857000 (DMA)
[ 794.107622] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3fc0 (virtual), 0x37857000 (DMA)
[ 794.107626] xhci_hcd 0000:01:00.0: Setting stream 29 ring ptr to 0x37857003
[ 794.107628] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7540
[ 794.107631] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3e60
[ 794.107634] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037857400 (virtual) 0x37857400 (DMA)
[ 794.107638] xhci_hcd 0000:01:00.0: Linking segment 0x37857400 to segment 0x37857400 (DMA)
[ 794.107641] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3e60 (virtual), 0x37857400 (DMA)
[ 794.107644] xhci_hcd 0000:01:00.0: Setting stream 30 ring ptr to 0x37857403
[ 794.107646] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7840
[ 794.107649] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3fe0
[ 794.107652] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037857800 (virtual) 0x37857800 (DMA)
[ 794.107656] xhci_hcd 0000:01:00.0: Linking segment 0x37857800 to segment 0x37857800 (DMA)
[ 794.107659] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3fe0 (virtual), 0x37857800 (DMA)
[ 794.107662] xhci_hcd 0000:01:00.0: Setting stream 31 ring ptr to 0x37857803
[ 794.107696] xhci_hcd 0000:01:00.0: Allocating 32 streams and 32 stream context array entries.
[ 794.107702] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac77e0
[ 794.107704] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3680
[ 794.107708] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1833000 (virtual) 0xc1833000 (DMA)
[ 794.107712] xhci_hcd 0000:01:00.0: Linking segment 0xc1833000 to segment 0xc1833000 (DMA)
[ 794.107715] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3680 (virtual), 0xc1833000 (DMA)
[ 794.107719] xhci_hcd 0000:01:00.0: Setting stream 1 ring ptr to 0xc1833003
[ 794.107722] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac78a0
[ 794.107725] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3340
[ 794.107728] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1833400 (virtual) 0xc1833400 (DMA)
[ 794.107732] xhci_hcd 0000:01:00.0: Linking segment 0xc1833400 to segment 0xc1833400 (DMA)
[ 794.107735] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3340 (virtual), 0xc1833400 (DMA)
[ 794.107738] xhci_hcd 0000:01:00.0: Setting stream 2 ring ptr to 0xc1833403
[ 794.107741] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7480
[ 794.107743] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3f20
[ 794.107746] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1833800 (virtual) 0xc1833800 (DMA)
[ 794.107750] xhci_hcd 0000:01:00.0: Linking segment 0xc1833800 to segment 0xc1833800 (DMA)
[ 794.107753] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3f20 (virtual), 0xc1833800 (DMA)
[ 794.107756] xhci_hcd 0000:01:00.0: Setting stream 3 ring ptr to 0xc1833803
[ 794.107759] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7900
[ 794.107761] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3920
[ 794.107765] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037ad2000 (virtual) 0x37ad2000 (DMA)
[ 794.107770] xhci_hcd 0000:01:00.0: Linking segment 0x37ad2000 to segment 0x37ad2000 (DMA)
[ 794.107773] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3920 (virtual), 0x37ad2000 (DMA)
[ 794.107776] xhci_hcd 0000:01:00.0: Setting stream 4 ring ptr to 0x37ad2003
[ 794.107779] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac7240
[ 794.107781] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc36a0
[ 794.107784] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037ad2400 (virtual) 0x37ad2400 (DMA)
[ 794.107789] xhci_hcd 0000:01:00.0: Linking segment 0x37ad2400 to segment 0x37ad2400 (DMA)
[ 794.107791] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc36a0 (virtual), 0x37ad2400 (DMA)
[ 794.107795] xhci_hcd 0000:01:00.0: Setting stream 5 ring ptr to 0x37ad2403
[ 794.107797] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037ac71e0
[ 794.107800] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3e00
[ 794.107803] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037ad2800 (virtual) 0x37ad2800 (DMA)
[ 794.107807] xhci_hcd 0000:01:00.0: Linking segment 0x37ad2800 to segment 0x37ad2800 (DMA)
[ 794.107810] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3e00 (virtual), 0x37ad2800 (DMA)
[ 794.107813] xhci_hcd 0000:01:00.0: Setting stream 6 ring ptr to 0x37ad2803
[ 794.107816] xhci_hcd 0000:01:00.0: Allocating ring at ffff8800378854e0
[ 794.107818] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc39a0
[ 794.107822] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1855000 (virtual) 0xc1855000 (DMA)
[ 794.107827] xhci_hcd 0000:01:00.0: Linking segment 0xc1855000 to segment 0xc1855000 (DMA)
[ 794.107830] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc39a0 (virtual), 0xc1855000 (DMA)
[ 794.107833] xhci_hcd 0000:01:00.0: Setting stream 7 ring ptr to 0xc1855003
[ 794.107836] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037885d80
[ 794.107838] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3da0
[ 794.107841] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1855400 (virtual) 0xc1855400 (DMA)
[ 794.107846] xhci_hcd 0000:01:00.0: Linking segment 0xc1855400 to segment 0xc1855400 (DMA)
[ 794.107848] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3da0 (virtual), 0xc1855400 (DMA)
[ 794.107852] xhci_hcd 0000:01:00.0: Setting stream 8 ring ptr to 0xc1855403
[ 794.107854] xhci_hcd 0000:01:00.0: Allocating ring at ffff8800378857e0
[ 794.107857] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3ee0
[ 794.107860] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1855800 (virtual) 0xc1855800 (DMA)
[ 794.107864] xhci_hcd 0000:01:00.0: Linking segment 0xc1855800 to segment 0xc1855800 (DMA)
[ 794.107867] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3ee0 (virtual), 0xc1855800 (DMA)
[ 794.107870] xhci_hcd 0000:01:00.0: Setting stream 9 ring ptr to 0xc1855803
[ 794.107872] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037885360
[ 794.107875] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc36e0
[ 794.107879] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1857000 (virtual) 0xc1857000 (DMA)
[ 794.107883] xhci_hcd 0000:01:00.0: Linking segment 0xc1857000 to segment 0xc1857000 (DMA)
[ 794.107886] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc36e0 (virtual), 0xc1857000 (DMA)
[ 794.107889] xhci_hcd 0000:01:00.0: Setting stream 10 ring ptr to 0xc1857003
[ 794.107892] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037885780
[ 794.107894] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3900
[ 794.107897] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1857400 (virtual) 0xc1857400 (DMA)
[ 794.107901] xhci_hcd 0000:01:00.0: Linking segment 0xc1857400 to segment 0xc1857400 (DMA)
[ 794.107904] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3900 (virtual), 0xc1857400 (DMA)
[ 794.107907] xhci_hcd 0000:01:00.0: Setting stream 11 ring ptr to 0xc1857403
[ 794.107910] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037885060
[ 794.107913] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3f60
[ 794.107915] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1857800 (virtual) 0xc1857800 (DMA)
[ 794.107920] xhci_hcd 0000:01:00.0: Linking segment 0xc1857800 to segment 0xc1857800 (DMA)
[ 794.107923] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3f60 (virtual), 0xc1857800 (DMA)
[ 794.107926] xhci_hcd 0000:01:00.0: Setting stream 12 ring ptr to 0xc1857803
[ 794.107928] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037885120
[ 794.107931] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc36c0
[ 794.107935] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037aac000 (virtual) 0x37aac000 (DMA)
[ 794.107939] xhci_hcd 0000:01:00.0: Linking segment 0x37aac000 to segment 0x37aac000 (DMA)
[ 794.107942] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc36c0 (virtual), 0x37aac000 (DMA)
[ 794.107945] xhci_hcd 0000:01:00.0: Setting stream 13 ring ptr to 0x37aac003
[ 794.107947] xhci_hcd 0000:01:00.0: Allocating ring at ffff8800378853c0
[ 794.107950] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc3f00
[ 794.107953] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037aac400 (virtual) 0x37aac400 (DMA)
[ 794.107957] xhci_hcd 0000:01:00.0: Linking segment 0x37aac400 to segment 0x37aac400 (DMA)
[ 794.107960] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc3f00 (virtual), 0x37aac400 (DMA)
[ 794.107963] xhci_hcd 0000:01:00.0: Setting stream 14 ring ptr to 0x37aac403
[ 794.107966] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037885f60
[ 794.107968] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff880037bc35e0
[ 794.107971] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037aac800 (virtual) 0x37aac800 (DMA)
[ 794.107976] xhci_hcd 0000:01:00.0: Linking segment 0x37aac800 to segment 0x37aac800 (DMA)
[ 794.107978] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff880037bc35e0 (virtual), 0x37aac800 (DMA)
[ 794.107981] xhci_hcd 0000:01:00.0: Setting stream 15 ring ptr to 0x37aac803
[ 794.107984] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037885ea0
[ 794.107987] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff88012154ad60
[ 794.107991] xhci_hcd 0000:01:00.0: // Allocating segment at ffff88003799e000 (virtual) 0x3799e000 (DMA)
[ 794.107996] xhci_hcd 0000:01:00.0: Linking segment 0x3799e000 to segment 0x3799e000 (DMA)
[ 794.107999] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff88012154ad60 (virtual), 0x3799e000 (DMA)
[ 794.108002] xhci_hcd 0000:01:00.0: Setting stream 16 ring ptr to 0x3799e003
[ 794.108005] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037885600
[ 794.108007] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff88012154a0a0
[ 794.108010] xhci_hcd 0000:01:00.0: // Allocating segment at ffff88003799e400 (virtual) 0x3799e400 (DMA)
[ 794.108015] xhci_hcd 0000:01:00.0: Linking segment 0x3799e400 to segment 0x3799e400 (DMA)
[ 794.108018] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff88012154a0a0 (virtual), 0x3799e400 (DMA)
[ 794.108021] xhci_hcd 0000:01:00.0: Setting stream 17 ring ptr to 0x3799e403
[ 794.108023] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037885840
[ 794.108026] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff88012154a820
[ 794.108029] xhci_hcd 0000:01:00.0: // Allocating segment at ffff88003799e800 (virtual) 0x3799e800 (DMA)
[ 794.108033] xhci_hcd 0000:01:00.0: Linking segment 0x3799e800 to segment 0x3799e800 (DMA)
[ 794.108036] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff88012154a820 (virtual), 0x3799e800 (DMA)
[ 794.108039] xhci_hcd 0000:01:00.0: Setting stream 18 ring ptr to 0x3799e803
[ 794.108042] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037885960
[ 794.108044] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff88012154a600
[ 794.108048] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1844000 (virtual) 0xc1844000 (DMA)
[ 794.108052] xhci_hcd 0000:01:00.0: Linking segment 0xc1844000 to segment 0xc1844000 (DMA)
[ 794.108055] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff88012154a600 (virtual), 0xc1844000 (DMA)
[ 794.108058] xhci_hcd 0000:01:00.0: Setting stream 19 ring ptr to 0xc1844003
[ 794.108061] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037885ae0
[ 794.108064] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff88012154a220
[ 794.108067] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1844400 (virtual) 0xc1844400 (DMA)
[ 794.108071] xhci_hcd 0000:01:00.0: Linking segment 0xc1844400 to segment 0xc1844400 (DMA)
[ 794.108074] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff88012154a220 (virtual), 0xc1844400 (DMA)
[ 794.108077] xhci_hcd 0000:01:00.0: Setting stream 20 ring ptr to 0xc1844403
[ 794.108080] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037885c00
[ 794.108082] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff88012154a800
[ 794.108085] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1844800 (virtual) 0xc1844800 (DMA)
[ 794.108089] xhci_hcd 0000:01:00.0: Linking segment 0xc1844800 to segment 0xc1844800 (DMA)
[ 794.108092] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff88012154a800 (virtual), 0xc1844800 (DMA)
[ 794.108095] xhci_hcd 0000:01:00.0: Setting stream 21 ring ptr to 0xc1844803
[ 794.108098] xhci_hcd 0000:01:00.0: Allocating ring at ffff880037885a20
[ 794.108100] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff88012154aa20
[ 794.108105] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1830000 (virtual) 0xc1830000 (DMA)
[ 794.108109] xhci_hcd 0000:01:00.0: Linking segment 0xc1830000 to segment 0xc1830000 (DMA)
[ 794.108112] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff88012154aa20 (virtual), 0xc1830000 (DMA)
[ 794.108115] xhci_hcd 0000:01:00.0: Setting stream 22 ring ptr to 0xc1830003
[ 794.108117] xhci_hcd 0000:01:00.0: Allocating ring at ffff8800378852a0
[ 794.108120] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff88012154abe0
[ 794.108123] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1830400 (virtual) 0xc1830400 (DMA)
[ 794.108127] xhci_hcd 0000:01:00.0: Linking segment 0xc1830400 to segment 0xc1830400 (DMA)
[ 794.108130] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff88012154abe0 (virtual), 0xc1830400 (DMA)
[ 794.108133] xhci_hcd 0000:01:00.0: Setting stream 23 ring ptr to 0xc1830403
[ 794.108136] xhci_hcd 0000:01:00.0: Allocating ring at ffff8800378859c0
[ 794.108138] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff88012154aa00
[ 794.108141] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1830800 (virtual) 0xc1830800 (DMA)
[ 794.108145] xhci_hcd 0000:01:00.0: Linking segment 0xc1830800 to segment 0xc1830800 (DMA)
[ 794.108148] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff88012154aa00 (virtual), 0xc1830800 (DMA)
[ 794.108151] xhci_hcd 0000:01:00.0: Setting stream 24 ring ptr to 0xc1830803
[ 794.108154] xhci_hcd 0000:01:00.0: Allocating ring at ffff880123abcf00
[ 794.108157] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff88012154a3c0
[ 794.108161] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037b12000 (virtual) 0x37b12000 (DMA)
[ 794.108165] xhci_hcd 0000:01:00.0: Linking segment 0x37b12000 to segment 0x37b12000 (DMA)
[ 794.108168] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff88012154a3c0 (virtual), 0x37b12000 (DMA)
[ 794.108171] xhci_hcd 0000:01:00.0: Setting stream 25 ring ptr to 0x37b12003
[ 794.108174] xhci_hcd 0000:01:00.0: Allocating ring at ffff880123abc120
[ 794.108177] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff88012154aaa0
[ 794.108180] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037b12400 (virtual) 0x37b12400 (DMA)
[ 794.108184] xhci_hcd 0000:01:00.0: Linking segment 0x37b12400 to segment 0x37b12400 (DMA)
[ 794.108187] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff88012154aaa0 (virtual), 0x37b12400 (DMA)
[ 794.108190] xhci_hcd 0000:01:00.0: Setting stream 26 ring ptr to 0x37b12403
[ 794.108193] xhci_hcd 0000:01:00.0: Allocating ring at ffff880123abcb40
[ 794.108195] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff88012154a620
[ 794.108198] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037b12800 (virtual) 0x37b12800 (DMA)
[ 794.108202] xhci_hcd 0000:01:00.0: Linking segment 0x37b12800 to segment 0x37b12800 (DMA)
[ 794.108205] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff88012154a620 (virtual), 0x37b12800 (DMA)
[ 794.108208] xhci_hcd 0000:01:00.0: Setting stream 27 ring ptr to 0x37b12803
[ 794.108211] xhci_hcd 0000:01:00.0: Allocating ring at ffff880123abc6c0
[ 794.108213] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff88012154a860
[ 794.108217] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1864000 (virtual) 0xc1864000 (DMA)
[ 794.108221] xhci_hcd 0000:01:00.0: Linking segment 0xc1864000 to segment 0xc1864000 (DMA)
[ 794.108224] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff88012154a860 (virtual), 0xc1864000 (DMA)
[ 794.108227] xhci_hcd 0000:01:00.0: Setting stream 28 ring ptr to 0xc1864003
[ 794.108230] xhci_hcd 0000:01:00.0: Allocating ring at ffff880123abc4e0
[ 794.108233] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff88012154a680
[ 794.108236] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1864400 (virtual) 0xc1864400 (DMA)
[ 794.108240] xhci_hcd 0000:01:00.0: Linking segment 0xc1864400 to segment 0xc1864400 (DMA)
[ 794.108243] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff88012154a680 (virtual), 0xc1864400 (DMA)
[ 794.108246] xhci_hcd 0000:01:00.0: Setting stream 29 ring ptr to 0xc1864403
[ 794.108249] xhci_hcd 0000:01:00.0: Allocating ring at ffff880121c7a480
[ 794.108251] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff88012154a6e0
[ 794.108254] xhci_hcd 0000:01:00.0: // Allocating segment at ffff8800c1864800 (virtual) 0xc1864800 (DMA)
[ 794.108258] xhci_hcd 0000:01:00.0: Linking segment 0xc1864800 to segment 0xc1864800 (DMA)
[ 794.108261] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff88012154a6e0 (virtual), 0xc1864800 (DMA)
[ 794.108264] xhci_hcd 0000:01:00.0: Setting stream 30 ring ptr to 0xc1864803
[ 794.108267] xhci_hcd 0000:01:00.0: Allocating ring at ffff880121c7a720
[ 794.108270] xhci_hcd 0000:01:00.0: Allocating priv segment structure at ffff88012154af60
[ 794.108274] xhci_hcd 0000:01:00.0: // Allocating segment at ffff880037a37000 (virtual) 0x37a37000 (DMA)
[ 794.108278] xhci_hcd 0000:01:00.0: Linking segment 0x37a37000 to segment 0x37a37000 (DMA)
[ 794.108281] xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment ffff88012154af60 (virtual), 0x37a37000 (DMA)
[ 794.108284] xhci_hcd 0000:01:00.0: Setting stream 31 ring ptr to 0x37a37003
[ 794.108317] xhci_hcd 0000:01:00.0: Setting number of stream ctx array entries to 32
[ 794.108319] xhci_hcd 0000:01:00.0: Setting number of stream ctx array entries to 32
[ 794.108322] xhci_hcd 0000:01:00.0: Setting number of stream ctx array entries to 32
[ 794.108325] xhci_hcd 0000:01:00.0: Input Context:
[ 794.108328] xhci_hcd 0000:01:00.0: @ffff8800c1838000 (virt) @c1838000 (dma) 0x00002c - drop flags
[ 794.108331] xhci_hcd 0000:01:00.0: @ffff8800c1838004 (virt) @c1838004 (dma) 0x00002d - add flags
[ 794.108334] xhci_hcd 0000:01:00.0: @ffff8800c1838008 (virt) @c1838008 (dma) 0x000000 - rsvd2[0]
[ 794.108337] xhci_hcd 0000:01:00.0: @ffff8800c183800c (virt) @c183800c (dma) 0x000000 - rsvd2[1]
[ 794.108341] xhci_hcd 0000:01:00.0: @ffff8800c1838010 (virt) @c1838010 (dma) 0x000000 - rsvd2[2]
[ 794.108344] xhci_hcd 0000:01:00.0: @ffff8800c1838014 (virt) @c1838014 (dma) 0x000000 - rsvd2[3]
[ 794.108347] xhci_hcd 0000:01:00.0: @ffff8800c1838018 (virt) @c1838018 (dma) 0x000000 - rsvd2[4]
[ 794.108350] xhci_hcd 0000:01:00.0: @ffff8800c183801c (virt) @c183801c (dma) 0x000000 - rsvd2[5]
[ 794.108352] xhci_hcd 0000:01:00.0: Slot Context:
[ 794.108355] xhci_hcd 0000:01:00.0: @ffff8800c1838020 (virt) @c1838020 (dma) 0x28400000 - dev_info
[ 794.108358] xhci_hcd 0000:01:00.0: @ffff8800c1838024 (virt) @c1838024 (dma) 0x010000 - dev_info2
[ 794.108361] xhci_hcd 0000:01:00.0: @ffff8800c1838028 (virt) @c1838028 (dma) 0x000000 - tt_info
[ 794.108364] xhci_hcd 0000:01:00.0: @ffff8800c183802c (virt) @c183802c (dma) 0x18000001 - dev_state
[ 794.108368] xhci_hcd 0000:01:00.0: @ffff8800c1838030 (virt) @c1838030 (dma) 0x000000 - rsvd[0]
[ 794.108371] xhci_hcd 0000:01:00.0: @ffff8800c1838034 (virt) @c1838034 (dma) 0x000000 - rsvd[1]
[ 794.108374] xhci_hcd 0000:01:00.0: @ffff8800c1838038 (virt) @c1838038 (dma) 0x000000 - rsvd[2]
[ 794.108377] xhci_hcd 0000:01:00.0: @ffff8800c183803c (virt) @c183803c (dma) 0x000000 - rsvd[3]
[ 794.108379] xhci_hcd 0000:01:00.0: Endpoint 00 Context:
[ 794.108382] xhci_hcd 0000:01:00.0: @ffff8800c1838040 (virt) @c1838040 (dma) 0x000000 - ep_info
[ 794.108385] xhci_hcd 0000:01:00.0: @ffff8800c1838044 (virt) @c1838044 (dma) 0x000000 - ep_info2
[ 794.108388] xhci_hcd 0000:01:00.0: @ffff8800c1838048 (virt) @c1838048 (dma) 0x000000 - deq
[ 794.108391] xhci_hcd 0000:01:00.0: @ffff8800c1838050 (virt) @c1838050 (dma) 0x000000 - tx_info
[ 794.108394] xhci_hcd 0000:01:00.0: @ffff8800c1838054 (virt) @c1838054 (dma) 0x000000 - rsvd[0]
[ 794.108397] xhci_hcd 0000:01:00.0: @ffff8800c1838058 (virt) @c1838058 (dma) 0x000000 - rsvd[1]
[ 794.108400] xhci_hcd 0000:01:00.0: @ffff8800c183805c (virt) @c183805c (dma) 0x000000 - rsvd[2]
[ 794.108403] xhci_hcd 0000:01:00.0: Endpoint 01 Context:
[ 794.108406] xhci_hcd 0000:01:00.0: @ffff8800c1838060 (virt) @c1838060 (dma) 0x009001 - ep_info
[ 794.108409] xhci_hcd 0000:01:00.0: @ffff8800c1838064 (virt) @c1838064 (dma) 0x4000016 - ep_info2
[ 794.108412] xhci_hcd 0000:01:00.0: @ffff8800c1838068 (virt) @c1838068 (dma) 0xc188f000 - deq
[ 794.108415] xhci_hcd 0000:01:00.0: @ffff8800c1838070 (virt) @c1838070 (dma) 0x000000 - tx_info
[ 794.108418] xhci_hcd 0000:01:00.0: @ffff8800c1838074 (virt) @c1838074 (dma) 0x000000 - rsvd[0]
[ 794.108421] xhci_hcd 0000:01:00.0: @ffff8800c1838078 (virt) @c1838078 (dma) 0x000000 - rsvd[1]
[ 794.108424] xhci_hcd 0000:01:00.0: @ffff8800c183807c (virt) @c183807c (dma) 0x000000 - rsvd[2]
[ 794.108427] xhci_hcd 0000:01:00.0: Endpoint 02 Context:
[ 794.108429] xhci_hcd 0000:01:00.0: @ffff8800c1838080 (virt) @c1838080 (dma) 0x009001 - ep_info
[ 794.108433] xhci_hcd 0000:01:00.0: @ffff8800c1838084 (virt) @c1838084 (dma) 0x4000036 - ep_info2
[ 794.108436] xhci_hcd 0000:01:00.0: @ffff8800c1838088 (virt) @c1838088 (dma) 0xc1817100 - deq
[ 794.108439] xhci_hcd 0000:01:00.0: @ffff8800c1838090 (virt) @c1838090 (dma) 0x000000 - tx_info
[ 794.108442] xhci_hcd 0000:01:00.0: @ffff8800c1838094 (virt) @c1838094 (dma) 0x000000 - rsvd[0]
[ 794.108445] xhci_hcd 0000:01:00.0: @ffff8800c1838098 (virt) @c1838098 (dma) 0x000000 - rsvd[1]
[ 794.108448] xhci_hcd 0000:01:00.0: @ffff8800c183809c (virt) @c183809c (dma) 0x000000 - rsvd[2]
[ 794.108451] xhci_hcd 0000:01:00.0: Endpoint 03 Context:
[ 794.108453] xhci_hcd 0000:01:00.0: @ffff8800c18380a0 (virt) @c18380a0 (dma) 0x000000 - ep_info
[ 794.108456] xhci_hcd 0000:01:00.0: @ffff8800c18380a4 (virt) @c18380a4 (dma) 0x000000 - ep_info2
[ 794.108459] xhci_hcd 0000:01:00.0: @ffff8800c18380a8 (virt) @c18380a8 (dma) 0x000000 - deq
[ 794.108462] xhci_hcd 0000:01:00.0: @ffff8800c18380b0 (virt) @c18380b0 (dma) 0x000000 - tx_info
[ 794.108465] xhci_hcd 0000:01:00.0: @ffff8800c18380b4 (virt) @c18380b4 (dma) 0x000000 - rsvd[0]
[ 794.108468] xhci_hcd 0000:01:00.0: @ffff8800c18380b8 (virt) @c18380b8 (dma) 0x000000 - rsvd[1]
[ 794.108472] xhci_hcd 0000:01:00.0: @ffff8800c18380bc (virt) @c18380bc (dma) 0x000000 - rsvd[2]
[ 794.108474] xhci_hcd 0000:01:00.0: Endpoint 04 Context:
[ 794.108477] xhci_hcd 0000:01:00.0: @ffff8800c18380c0 (virt) @c18380c0 (dma) 0x009001 - ep_info
[ 794.108480] xhci_hcd 0000:01:00.0: @ffff8800c18380c4 (virt) @c18380c4 (dma) 0x4000036 - ep_info2
[ 794.108483] xhci_hcd 0000:01:00.0: @ffff8800c18380c8 (virt) @c18380c8 (dma) 0xc1817000 - deq
[ 794.108486] xhci_hcd 0000:01:00.0: @ffff8800c18380d0 (virt) @c18380d0 (dma) 0x000000 - tx_info
[ 794.108489] xhci_hcd 0000:01:00.0: @ffff8800c18380d4 (virt) @c18380d4 (dma) 0x000000 - rsvd[0]
[ 794.108492] xhci_hcd 0000:01:00.0: @ffff8800c18380d8 (virt) @c18380d8 (dma) 0x000000 - rsvd[1]
[ 794.108495] xhci_hcd 0000:01:00.0: @ffff8800c18380dc (virt) @c18380dc (dma) 0x000000 - rsvd[2]
[ 794.108498] xhci_hcd 0000:01:00.0: Endpoint 05 Context:
[ 794.108500] xhci_hcd 0000:01:00.0: @ffff8800c18380e0 (virt) @c18380e0 (dma) 0x000000 - ep_info
[ 794.108503] xhci_hcd 0000:01:00.0: @ffff8800c18380e4 (virt) @c18380e4 (dma) 0x000000 - ep_info2
[ 794.108506] xhci_hcd 0000:01:00.0: @ffff8800c18380e8 (virt) @c18380e8 (dma) 0x000000 - deq
[ 794.108509] xhci_hcd 0000:01:00.0: @ffff8800c18380f0 (virt) @c18380f0 (dma) 0x000000 - tx_info
[ 794.108512] xhci_hcd 0000:01:00.0: @ffff8800c18380f4 (virt) @c18380f4 (dma) 0x000000 - rsvd[0]
[ 794.108516] xhci_hcd 0000:01:00.0: @ffff8800c18380f8 (virt) @c18380f8 (dma) 0x000000 - rsvd[1]
[ 794.108519] xhci_hcd 0000:01:00.0: @ffff8800c18380fc (virt) @c18380fc (dma) 0x000000 - rsvd[2]
[ 794.108522] xhci_hcd 0000:01:00.0: Endpoint state = 0x1
[ 794.108525] xhci_hcd 0000:01:00.0: Command ring enq = 0x3781b350 (DMA)
[ 794.108528] xhci_hcd 0000:01:00.0: // Ding dong!
[ 794.108530] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c800, 32'h0, 4'hf);
[ 794.109143] xhci_hcd 0000:01:00.0: op reg status = 00000008
[ 794.109146] xhci_hcd 0000:01:00.0: Event ring dequeue ptr:
[ 794.109149] xhci_hcd 0000:01:00.0: @3781b470 3781b340 00000000 01000000 01008400
[ 794.109152] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c024, 32'h8, 4'hf);
[ 794.109155] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 794.109157] xhci_hcd 0000:01:00.0: xhci_handle_event - OS owns TRB
[ 794.109160] xhci_hcd 0000:01:00.0: xhci_handle_event - calling handle_cmd_completion
[ 794.109165] xhci_hcd 0000:01:00.0: Command ring deq = 0x3781b350 (DMA)
[ 794.109167] xhci_hcd 0000:01:00.0: xhci_handle_event - returned from handle_cmd_completion
[ 794.109170] xhci_hcd 0000:01:00.0: Event ring deq = 0x3781b480 (DMA)
[ 794.109172] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 794.109177] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 64'hffffc9000064c638, 64'h3781b488, 4'hf);
[ 794.109247] usb 10-1: Successful Endpoint Configure command
[ 794.109251] xhci_hcd 0000:01:00.0: Slot 1 ep ctx 4 now has streams.
[ 794.109253] xhci_hcd 0000:01:00.0: Slot 1 ep ctx 2 now has streams.
[ 794.109256] xhci_hcd 0000:01:00.0: Slot 1 ep ctx 1 now has streams.
[ 794.110022] usb usb9: usb auto-resume
[ 794.110028] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c020, 32'h1, 4'hf);
[ 794.110033] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c450, 32'h2a0, 4'hf);
[ 794.110037] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c454, 32'h0, 4'hf);
[ 794.110042] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c440, 32'h2a0, 4'hf);
[ 794.110045] usbcore: registered new interface driver usb-storage
[ 794.110047] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c444, 32'h0, 4'hf);
[ 794.110050] USB Mass Storage support registered.
[ 794.110052] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c020, 32'h5, 4'hf);
[ 794.113726] xhci_hcd 0000:01:00.0: ep 0x82 - urb len = 0x70 (112), addr = 0x12176c500, num_trbs = 1
[ 794.113730] xhci_hcd 0000:01:00.0: Endpoint state = 0x1
[ 794.113734] xhci_hcd 0000:01:00.0: Ring enq = 0xc18d4410 (DMA)
[ 794.113738] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c804, 32'h10005, 4'hf);
[ 794.113742] xhci_hcd 0000:01:00.0: count sg list trbs:
[ 794.113745] xhci_hcd 0000:01:00.0: sg #0: dma = 0x1243c0a00, len = 0x24 (36), num_trbs = 1
[ 794.113748] xhci_hcd 0000:01:00.0:
[ 794.113750] xhci_hcd 0000:01:00.0: ep 0x81 - urb len = 36, sglist used, num_trbs = 1
[ 794.113753] xhci_hcd 0000:01:00.0: Endpoint state = 0x1
[ 794.113755] xhci_hcd 0000:01:00.0: First length to xfer from 1st sglist entry = 36
[ 794.113759] xhci_hcd 0000:01:00.0: sg entry: dma = 0x243c0a00, len = 0x24 (36), 64KB boundary at 0x243d0000, end dma = 0x243c0a24
[ 794.113762] xhci_hcd 0000:01:00.0: Ring enq = 0xc1821810 (DMA)
[ 794.113765] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c804, 32'h10003, 4'hf);
[ 794.113770] xhci_hcd 0000:01:00.0: ep 0x2 - urb len = 0x20 (32), addr = 0x378e83a0, num_trbs = 1
[ 794.113772] xhci_hcd 0000:01:00.0: Endpoint state = 0x1
[ 794.113775] xhci_hcd 0000:01:00.0: Ring enq = 0xc18d4010 (DMA)
[ 794.113778] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c804, 32'h4, 4'hf);
[ 794.113784] xhci_hcd 0000:01:00.0: op reg status = 00000008
[ 794.113786] xhci_hcd 0000:01:00.0: Event ring dequeue ptr:
[ 794.113789] xhci_hcd 0000:01:00.0: @3781b480 00000000 00000000 04000000 01058000
[ 794.113792] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c024, 32'h8, 4'hf);
[ 794.113794] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 794.113797] xhci_hcd 0000:01:00.0: xhci_handle_event - OS owns TRB
[ 794.113799] xhci_hcd 0000:01:00.0: xhci_handle_event - calling handle_tx_event
[ 794.113802] xhci_hcd 0000:01:00.0: handle_tx_event - ep index = 4
[ 794.113805] xhci_hcd 0000:01:00.0: ERROR Transfer event for disabled endpoint or incorrect stream ring
[ 794.113808] xhci_hcd 0000:01:00.0: xhci_handle_event - returned from handle_tx_event
[ 794.113811] xhci_hcd 0000:01:00.0: Event ring deq = 0x3781b490 (DMA)
[ 794.113814] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 794.113816] xhci_hcd 0000:01:00.0: xhci_handle_event - OS owns TRB
[ 794.113818] xhci_hcd 0000:01:00.0: xhci_handle_event - calling handle_tx_event
[ 794.113821] xhci_hcd 0000:01:00.0: handle_tx_event - ep index = 2
[ 794.113823] xhci_hcd 0000:01:00.0: ERROR Transfer event for disabled endpoint or incorrect stream ring
[ 794.113826] xhci_hcd 0000:01:00.0: xhci_handle_event - returned from handle_tx_event
[ 794.113829] xhci_hcd 0000:01:00.0: Event ring deq = 0x3781b4a0 (DMA)
[ 794.113831] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 794.113833] xhci_hcd 0000:01:00.0: xhci_handle_event - OS owns TRB
[ 794.113835] xhci_hcd 0000:01:00.0: xhci_handle_event - calling handle_tx_event
[ 794.113838] xhci_hcd 0000:01:00.0: handle_tx_event - ep index = 3
[ 794.113840] xhci_hcd 0000:01:00.0: WARN: transfer error on endpoint
[ 794.113844] xhci_hcd 0000:01:00.0: ep 0x2 - asked for 32 bytes, 32 bytes untransferred
[ 794.113847] xhci_hcd 0000:01:00.0: Endpoint state = 0x1
[ 794.113849] xhci_hcd 0000:01:00.0: Command ring enq = 0x3781b360 (DMA)
[ 794.113852] xhci_hcd 0000:01:00.0: Cleaning up stalled endpoint ring
[ 794.113854] xhci_hcd 0000:01:00.0: Finding segment containing stopped TRB.
[ 794.113856] xhci_hcd 0000:01:00.0: Finding endpoint context
[ 794.113858] xhci_hcd 0000:01:00.0: Finding segment containing last TRB in TD.
[ 794.113861] xhci_hcd 0000:01:00.0: Cycle state = 0x1
[ 794.113863] xhci_hcd 0000:01:00.0: New dequeue segment = ffff880037bc3540 (virtual)
[ 794.113866] xhci_hcd 0000:01:00.0: New dequeue pointer = 0xc18d4010 (DMA)
[ 794.113868] xhci_hcd 0000:01:00.0: Queueing new dequeue state
[ 794.113871] xhci_hcd 0000:01:00.0: Set TR Deq Ptr cmd, new deq seg = ffff880037bc3540 (0xc18d4000 dma), new deq ptr = ffff8800c18d4010 (0xc18d4010 dma), new cycle = 1
[ 794.113875] xhci_hcd 0000:01:00.0: Endpoint state = 0x1
[ 794.113877] xhci_hcd 0000:01:00.0: Command ring enq = 0x3781b370 (DMA)
[ 794.113880] xhci_hcd 0000:01:00.0: // Ding dong!
[ 794.113882] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c800, 32'h0, 4'hf);
[ 794.113886] xhci_hcd 0000:01:00.0: Event ring deq = 0x3781b4b0 (DMA)
[ 794.113889] xhci_hcd 0000:01:00.0: Giveback URB ffff880122cf53c0, len = 0, status = -71
[ 794.113893] xhci_hcd 0000:01:00.0: xhci_handle_event - returned from handle_tx_event
[ 794.113895] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 794.113900] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 64'hffffc9000064c638, 64'h3781b4b8, 4'hf);
[ 794.113955] xhci_hcd 0000:01:00.0: op reg status = 00000008
[ 794.113958] xhci_hcd 0000:01:00.0: Event ring dequeue ptr:
[ 794.113961] xhci_hcd 0000:01:00.0: @3781b4b0 3781b350 00000000 01000000 01008400
[ 794.113964] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c024, 32'h8, 4'hf);
[ 794.113967] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 794.113969] xhci_hcd 0000:01:00.0: xhci_handle_event - OS owns TRB
[ 794.113972] xhci_hcd 0000:01:00.0: xhci_handle_event - calling handle_cmd_completion
[ 794.113975] xhci_hcd 0000:01:00.0: Ignoring reset ep completion code of 1
[ 794.113978] xhci_hcd 0000:01:00.0: Command ring deq = 0x3781b360 (DMA)
[ 794.113980] xhci_hcd 0000:01:00.0: xhci_handle_event - returned from handle_cmd_completion
[ 794.113983] xhci_hcd 0000:01:00.0: Event ring deq = 0x3781b4c0 (DMA)
[ 794.113985] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 794.113991] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 64'hffffc9000064c638, 64'h3781b4c8, 4'hf);
[ 794.114012] xhci_hcd 0000:01:00.0: op reg status = 00000008
[ 794.114014] xhci_hcd 0000:01:00.0: Event ring dequeue ptr:
[ 794.114017] xhci_hcd 0000:01:00.0: @3781b4c0 3781b360 00000000 01000000 01008400
[ 794.114020] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c024, 32'h8, 4'hf);
[ 794.114023] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 794.114025] xhci_hcd 0000:01:00.0: xhci_handle_event - OS owns TRB
[ 794.114027] xhci_hcd 0000:01:00.0: xhci_handle_event - calling handle_cmd_completion
[ 794.114030] xhci_hcd 0000:01:00.0: Successful Set TR Deq Ptr cmd, deq = @c18d4011
[ 794.114033] xhci_hcd 0000:01:00.0: Command ring deq = 0x3781b370 (DMA)
[ 794.114036] xhci_hcd 0000:01:00.0: xhci_handle_event - returned from handle_cmd_completion
[ 794.114038] xhci_hcd 0000:01:00.0: Event ring deq = 0x3781b4d0 (DMA)
[ 794.114041] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 794.114046] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 64'hffffc9000064c638, 64'h3781b4d8, 4'hf);
[ 794.130022] hub 9-0:1.0: hub_resume
[ 794.130030] xhci_hcd 0000:01:00.0: get port status, actual port 0 status = 0x2a0
[ 794.130032] xhci_hcd 0000:01:00.0: Get port status returned 0x100
[ 794.130037] xhci_hcd 0000:01:00.0: get port status, actual port 1 status = 0x2a0
[ 794.130038] xhci_hcd 0000:01:00.0: Get port status returned 0x100
[ 794.130046] hub 9-0:1.0: state 7 ports 2 chg 0000 evt 0000
[ 794.130088] usb usb8: usb auto-resume
[ 794.130091] usb usb8: wakeup_rh
[ 794.180014] hub 8-0:1.0: hub_resume
[ 794.180033] hub 8-0:1.0: state 7 ports 2 chg 0000 evt 0000
[ 794.180069] usb usb7: usb auto-resume
[ 794.180072] usb usb7: wakeup_rh
[ 794.230013] hub 7-0:1.0: hub_resume
[ 794.230030] hub 7-0:1.0: state 7 ports 2 chg 0000 evt 0000
[ 794.230058] usb usb6: usb auto-resume
[ 794.230061] usb usb6: wakeup_rh
[ 794.280015] hub 6-0:1.0: hub_resume
[ 794.280032] hub 6-0:1.0: state 7 ports 2 chg 0000 evt 0000
[ 794.280059] usb usb5: usb auto-resume
[ 794.280061] usb usb5: wakeup_rh
[ 794.330015] hub 5-0:1.0: hub_resume
[ 794.330031] hub 5-0:1.0: state 7 ports 2 chg 0000 evt 0000
[ 794.330143] usb usb3: usb auto-resume
[ 794.330146] usb usb3: wakeup_rh
[ 794.380017] hub 3-0:1.0: hub_resume
[ 794.380034] hub 3-0:1.0: state 7 ports 2 chg 0000 evt 0000
[ 794.380059] usb usb2: usb auto-resume
[ 794.380063] ehci_hcd 0000:00:1d.7: resume root hub
[ 794.420017] hub 2-0:1.0: hub_resume
[ 794.420037] hub 2-0:1.0: state 7 ports 6 chg 0000 evt 0000
[ 794.420067] usb usb1: usb auto-resume
[ 794.420071] ehci_hcd 0000:00:1a.7: resume root hub
[ 794.490011] hub 1-0:1.0: hub_resume
[ 794.490031] hub 1-0:1.0: state 7 ports 6 chg 0000 evt 0000
[ 795.290017] usb usb7: suspend_rh (auto-stop)
[ 795.290027] usb usb8: suspend_rh (auto-stop)
[ 795.290047] usb usb6: suspend_rh (auto-stop)
[ 795.540018] usb usb3: suspend_rh (auto-stop)
[ 795.540028] usb usb5: suspend_rh (auto-stop)
[ 796.130018] hub 9-0:1.0: hub_suspend
[ 796.130026] usb usb9: bus auto-suspend
[ 796.130032] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c450, 32'ha0002a0, 4'hf);
[ 796.130036] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c454, 32'h8, 4'hf);
[ 796.130040] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c440, 32'ha0002a0, 4'hf);
[ 796.130045] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c444, 32'h8, 4'hf);
[ 796.180014] hub 8-0:1.0: hub_suspend
[ 796.180019] usb usb8: bus auto-suspend
[ 796.180021] usb usb8: suspend_rh
[ 796.230014] hub 7-0:1.0: hub_suspend
[ 796.230019] usb usb7: bus auto-suspend
[ 796.230021] usb usb7: suspend_rh
[ 796.280009] hub 6-0:1.0: hub_suspend
[ 796.280015] usb usb6: bus auto-suspend
[ 796.280017] usb usb6: suspend_rh
[ 797.010018] hub 1-0:1.0: hub_suspend
[ 797.010026] usb usb1: bus auto-suspend
[ 797.010029] ehci_hcd 0000:00:1a.7: suspend root hub
[ 797.020044] hub 5-0:1.0: hub_suspend
[ 797.020049] usb usb5: bus auto-suspend
[ 797.020051] usb usb5: suspend_rh
[ 797.020067] hub 3-0:1.0: hub_suspend
[ 797.020071] usb usb3: bus auto-suspend
[ 797.020073] usb usb3: suspend_rh
[ 797.050019] hub 2-0:1.0: hub_suspend
[ 797.050025] usb usb2: bus auto-suspend
[ 797.050028] ehci_hcd 0000:00:1d.7: suspend root hub
[ 798.992404] usb 4-2.2: uhci_result_common: failed with status 440000
[ 798.992412] uhci_hcd 0000:00:1a.1: release dev 9 ep81-INT, period 8, phase 4, 106 us
[ 799.010012] uhci_hcd 0000:00:1a.1: reserve dev 9 ep81-INT, period 8, phase 4, 106 us
[ 799.032403] usb 4-2.2: uhci_result_common: failed with status 440000
[ 799.032409] uhci_hcd 0000:00:1a.1: release dev 9 ep81-INT, period 8, phase 4, 106 us
[ 799.060010] uhci_hcd 0000:00:1a.1: reserve dev 9 ep81-INT, period 8, phase 4, 106 us
[ 799.080402] usb 4-2.2: uhci_result_common: failed with status 440000
[ 799.080408] uhci_hcd 0000:00:1a.1: release dev 9 ep81-INT, period 8, phase 4, 106 us
[ 799.100414] hub 4-2:1.0: state 7 ports 4 chg 0000 evt 0004
[ 799.103408] hub 4-2:1.0: port 2, status 0100, change 0001, 12 Mb/s
[ 799.103411] usb 4-2.2: USB disconnect, device number 9
[ 799.103414] usb 4-2.2: unregistering device
[ 799.103416] usb 4-2.2: unregistering interface 4-2.2:1.0
[ 799.220669] usb 4-2.2: usb_disable_device nuking all URBs
[ 799.381407] hub 4-2:1.0: debounce: port 2: total 100ms stable 100ms status 0x100
[ 802.556353] hub 4-2:1.0: state 7 ports 4 chg 0000 evt 0004
[ 802.559349] hub 4-2:1.0: port 2, status 0301, change 0001, 1.5 Mb/s
[ 802.721349] hub 4-2:1.0: debounce: port 2: total 100ms stable 100ms status 0x301
[ 802.801348] usb 4-2.2: new low speed USB device number 10 using uhci_hcd
[ 802.918345] usb 4-2.2: skipped 1 descriptor after interface
[ 802.923343] usb 4-2.2: default language 0x0409
[ 802.935344] usb 4-2.2: udev 10, busnum 4, minor = 393
[ 802.935347] usb 4-2.2: New USB device found, idVendor=413c, idProduct=3016
[ 802.935350] usb 4-2.2: New USB device strings: Mfr=0, Product=2, SerialNumber=0
[ 802.935353] usb 4-2.2: Product: Dell Premium USB Optical Mouse
[ 802.935422] usb 4-2.2: usb_probe_device
[ 802.935426] usb 4-2.2: configuration #1 chosen from 1 choice
[ 802.938351] usb 4-2.2: adding 4-2.2:1.0 (config #1, interface 0)
[ 802.938382] usbhid 4-2.2:1.0: usb_probe_interface
[ 802.938385] usbhid 4-2.2:1.0: usb_probe_interface - got id
[ 802.955667] input: Dell Premium USB Optical Mouse as /devices/pci0000:00/0000:00:1a.1/usb4/4-2/4-2.2/4-2.2:1.0/input/input11
[ 802.955756] generic-usb 0003:413C:3016.0008: input,hidraw1: USB HID v1.11 Mouse [Dell Premium USB Optical Mouse] on usb-0000:00:1a.1-2.2/input0
[ 802.957246] usb usb9: usb auto-resume
[ 802.957252] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c020, 32'h1, 4'hf);
[ 802.957257] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c450, 32'h2a0, 4'hf);
[ 802.957261] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c454, 32'h0, 4'hf);
[ 802.957266] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c440, 32'h2a0, 4'hf);
[ 802.957270] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c444, 32'h0, 4'hf);
[ 802.957275] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c020, 32'h5, 4'hf);
[ 802.966840] uhci_hcd 0000:00:1a.1: reserve dev 10 ep81-INT, period 8, phase 4, 106 us
[ 802.970049] hub 9-0:1.0: hub_resume
[ 802.970059] xhci_hcd 0000:01:00.0: get port status, actual port 0 status = 0x2a0
[ 802.970062] xhci_hcd 0000:01:00.0: Get port status returned 0x100
[ 802.970068] xhci_hcd 0000:01:00.0: get port status, actual port 1 status = 0x2a0
[ 802.970071] xhci_hcd 0000:01:00.0: Get port status returned 0x100
[ 802.970138] usb usb8: usb auto-resume
[ 802.970141] usb usb8: wakeup_rh
[ 802.970154] hub 9-0:1.0: state 7 ports 2 chg 0000 evt 0000
[ 803.020018] hub 8-0:1.0: hub_resume
[ 803.020037] hub 8-0:1.0: state 7 ports 2 chg 0000 evt 0000
[ 803.020084] usb usb7: usb auto-resume
[ 803.020087] usb usb7: wakeup_rh
[ 803.070014] hub 7-0:1.0: hub_resume
[ 803.070029] hub 7-0:1.0: state 7 ports 2 chg 0000 evt 0000
[ 803.070057] usb usb6: usb auto-resume
[ 803.070060] usb usb6: wakeup_rh
[ 803.120011] hub 6-0:1.0: hub_resume
[ 803.120028] hub 6-0:1.0: state 7 ports 2 chg 0000 evt 0000
[ 803.120053] usb usb5: usb auto-resume
[ 803.120056] usb usb5: wakeup_rh
[ 803.170015] hub 5-0:1.0: hub_resume
[ 803.170030] hub 5-0:1.0: state 7 ports 2 chg 0000 evt 0000
[ 803.170141] usb usb3: usb auto-resume
[ 803.170144] usb usb3: wakeup_rh
[ 803.220016] hub 3-0:1.0: hub_resume
[ 803.220032] hub 3-0:1.0: state 7 ports 2 chg 0000 evt 0000
[ 803.220057] usb usb2: usb auto-resume
[ 803.220061] ehci_hcd 0000:00:1d.7: resume root hub
[ 803.260013] hub 2-0:1.0: hub_resume
[ 803.260034] hub 2-0:1.0: state 7 ports 6 chg 0000 evt 0000
[ 803.260063] usb usb1: usb auto-resume
[ 803.260067] ehci_hcd 0000:00:1a.7: resume root hub
[ 803.330013] hub 1-0:1.0: hub_resume
[ 803.330035] hub 1-0:1.0: state 7 ports 6 chg 0000 evt 0000
[ 804.040026] usb usb8: suspend_rh (auto-stop)
[ 804.290016] usb usb7: suspend_rh (auto-stop)
[ 804.290025] usb usb6: suspend_rh (auto-stop)
[ 804.290044] usb usb5: suspend_rh (auto-stop)
[ 804.290062] usb usb3: suspend_rh (auto-stop)
[ 806.010042] hub 9-0:1.0: hub_suspend
[ 806.010051] usb usb9: bus auto-suspend
[ 806.010056] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c450, 32'ha0002a0, 4'hf);
[ 806.010061] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c454, 32'h8, 4'hf);
[ 806.010065] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c440, 32'ha0002a0, 4'hf);
[ 806.010069] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c444, 32'h8, 4'hf);
[ 806.010074] hub 8-0:1.0: hub_suspend
[ 806.010078] usb usb8: bus auto-suspend
[ 806.010081] usb usb8: suspend_rh
[ 806.010100] hub 7-0:1.0: hub_suspend
[ 806.010104] usb usb7: bus auto-suspend
[ 806.010106] usb usb7: suspend_rh
[ 806.010120] hub 6-0:1.0: hub_suspend
[ 806.010124] usb usb6: bus auto-suspend
[ 806.010126] usb usb6: suspend_rh
[ 806.010139] hub 5-0:1.0: hub_suspend
[ 806.010144] usb usb5: bus auto-suspend
[ 806.010146] usb usb5: suspend_rh
[ 806.010160] hub 3-0:1.0: hub_suspend
[ 806.010163] usb usb3: bus auto-suspend
[ 806.010165] usb usb3: suspend_rh
[ 806.020085] hub 1-0:1.0: hub_suspend
[ 806.020090] usb usb1: bus auto-suspend
[ 806.020093] ehci_hcd 0000:00:1a.7: suspend root hub
[ 806.040020] hub 2-0:1.0: hub_suspend
[ 806.040026] usb usb2: bus auto-suspend
[ 806.040028] ehci_hcd 0000:00:1d.7: suspend root hub
[ 815.120017] scsi 8:0:0:0: uas_eh_abort_handler tag -1
[ 815.120023] scsi 8:0:0:0: uas_eh_device_reset_handler tag -1
[ 815.120026] scsi 8:0:0:0: uas_eh_target_reset_handler tag -1
[ 815.120029] scsi 8:0:0:0: uas_eh_bus_reset_handler tag -1
[ 815.120040] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c420, 32'h1211, 4'hf);
[ 815.120045] xhci_hcd 0000:01:00.0: set port reset, actual port 0 status = 0x1311
[ 815.120052] xhci_hcd 0000:01:00.0: op reg status = 00000018
[ 815.120054] xhci_hcd 0000:01:00.0: Event ring dequeue ptr:
[ 815.120057] xhci_hcd 0000:01:00.0: @3781b4d0 01000000 00000000 01000000 00008800
[ 815.120060] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c024, 32'h18, 4'hf);
[ 815.120063] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 815.120065] xhci_hcd 0000:01:00.0: xhci_handle_event - OS owns TRB
[ 815.120068] xhci_hcd 0000:01:00.0: xhci_handle_event - calling handle_port_status
[ 815.120070] xhci_hcd 0000:01:00.0: Port Status Change Event for port 1
[ 815.120075] xhci_hcd 0000:01:00.0: Event ring deq = 0x3781b4e0 (DMA)
[ 815.120080] xhci_hcd 0000:01:00.0: xhci_handle_event - returned from handle_port_status
[ 815.120082] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 815.120087] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 64'hffffc9000064c638, 64'h3781b4e8, 4'hf);
[ 815.180012] xhci_hcd 0000:01:00.0: get port status, actual port 0 status = 0x201203
[ 815.180015] xhci_hcd 0000:01:00.0: Get port status returned 0x100203
[ 815.240012] xhci_hcd 0000:01:00.0: Resetting device with slot ID 1
[ 815.240016] xhci_hcd 0000:01:00.0: Endpoint state = 0x1
[ 815.240019] xhci_hcd 0000:01:00.0: Command ring enq = 0x3781b380 (DMA)
[ 815.240022] xhci_hcd 0000:01:00.0: // Ding dong!
[ 815.240025] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c800, 32'h0, 4'hf);
[ 815.240409] xhci_hcd 0000:01:00.0: op reg status = 00000008
[ 815.240412] xhci_hcd 0000:01:00.0: Event ring dequeue ptr:
[ 815.240415] xhci_hcd 0000:01:00.0: @3781b4e0 3781b370 00000000 01000000 01008400
[ 815.240419] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c024, 32'h8, 4'hf);
[ 815.240421] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 815.240424] xhci_hcd 0000:01:00.0: xhci_handle_event - OS owns TRB
[ 815.240426] xhci_hcd 0000:01:00.0: xhci_handle_event - calling handle_cmd_completion
[ 815.240429] xhci_hcd 0000:01:00.0: Completed reset device command.
[ 815.240433] xhci_hcd 0000:01:00.0: Command ring deq = 0x3781b380 (DMA)
[ 815.240435] xhci_hcd 0000:01:00.0: xhci_handle_event - returned from handle_cmd_completion
[ 815.240438] xhci_hcd 0000:01:00.0: Event ring deq = 0x3781b4f0 (DMA)
[ 815.240440] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 815.240445] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 64'hffffc9000064c638, 64'h3781b4f8, 4'hf);
[ 815.240451] xhci_hcd 0000:01:00.0: Successful reset device command.
[ 815.240455] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac77e0
[ 815.240458] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1833000 (virtual) 0xc1833000 (DMA)
[ 815.240462] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3680
[ 815.240465] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac78a0
[ 815.240468] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1833400 (virtual) 0xc1833400 (DMA)
[ 815.240471] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3340
[ 815.240473] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7480
[ 815.240476] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1833800 (virtual) 0xc1833800 (DMA)
[ 815.240479] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3f20
[ 815.240482] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7900
[ 815.240485] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037ad2000 (virtual) 0x37ad2000 (DMA)
[ 815.240487] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3920
[ 815.240490] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7240
[ 815.240493] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037ad2400 (virtual) 0x37ad2400 (DMA)
[ 815.240496] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc36a0
[ 815.240498] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac71e0
[ 815.240501] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037ad2800 (virtual) 0x37ad2800 (DMA)
[ 815.240504] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3e00
[ 815.240507] xhci_hcd 0000:01:00.0: Freeing ring at ffff8800378854e0
[ 815.240509] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1855000 (virtual) 0xc1855000 (DMA)
[ 815.240512] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc39a0
[ 815.240515] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037885d80
[ 815.240518] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1855400 (virtual) 0xc1855400 (DMA)
[ 815.240521] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3da0
[ 815.240524] xhci_hcd 0000:01:00.0: Freeing ring at ffff8800378857e0
[ 815.240526] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1855800 (virtual) 0xc1855800 (DMA)
[ 815.240529] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3ee0
[ 815.240532] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037885360
[ 815.240535] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1857000 (virtual) 0xc1857000 (DMA)
[ 815.240537] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc36e0
[ 815.240540] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037885780
[ 815.240543] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1857400 (virtual) 0xc1857400 (DMA)
[ 815.240545] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3900
[ 815.240548] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037885060
[ 815.240551] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1857800 (virtual) 0xc1857800 (DMA)
[ 815.240554] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3f60
[ 815.240557] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037885120
[ 815.240559] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037aac000 (virtual) 0x37aac000 (DMA)
[ 815.240562] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc36c0
[ 815.240565] xhci_hcd 0000:01:00.0: Freeing ring at ffff8800378853c0
[ 815.240568] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037aac400 (virtual) 0x37aac400 (DMA)
[ 815.240571] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3f00
[ 815.240573] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037885f60
[ 815.240576] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037aac800 (virtual) 0x37aac800 (DMA)
[ 815.240579] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc35e0
[ 815.240582] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037885ea0
[ 815.240585] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff88003799e000 (virtual) 0x3799e000 (DMA)
[ 815.240588] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff88012154ad60
[ 815.240590] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037885600
[ 815.240593] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff88003799e400 (virtual) 0x3799e400 (DMA)
[ 815.240596] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff88012154a0a0
[ 815.240599] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037885840
[ 815.240602] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff88003799e800 (virtual) 0x3799e800 (DMA)
[ 815.240604] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff88012154a820
[ 815.240607] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037885960
[ 815.240610] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1844000 (virtual) 0xc1844000 (DMA)
[ 815.240613] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff88012154a600
[ 815.240616] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037885ae0
[ 815.240618] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1844400 (virtual) 0xc1844400 (DMA)
[ 815.240621] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff88012154a220
[ 815.240624] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037885c00
[ 815.240626] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1844800 (virtual) 0xc1844800 (DMA)
[ 815.240629] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff88012154a800
[ 815.240632] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037885a20
[ 815.240635] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1830000 (virtual) 0xc1830000 (DMA)
[ 815.240638] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff88012154aa20
[ 815.240640] xhci_hcd 0000:01:00.0: Freeing ring at ffff8800378852a0
[ 815.240643] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1830400 (virtual) 0xc1830400 (DMA)
[ 815.240646] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff88012154abe0
[ 815.240649] xhci_hcd 0000:01:00.0: Freeing ring at ffff8800378859c0
[ 815.240651] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1830800 (virtual) 0xc1830800 (DMA)
[ 815.240654] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff88012154aa00
[ 815.240657] xhci_hcd 0000:01:00.0: Freeing ring at ffff880123abcf00
[ 815.240660] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037b12000 (virtual) 0x37b12000 (DMA)
[ 815.240663] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff88012154a3c0
[ 815.240665] xhci_hcd 0000:01:00.0: Freeing ring at ffff880123abc120
[ 815.240668] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037b12400 (virtual) 0x37b12400 (DMA)
[ 815.240671] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff88012154aaa0
[ 815.240674] xhci_hcd 0000:01:00.0: Freeing ring at ffff880123abcb40
[ 815.240676] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037b12800 (virtual) 0x37b12800 (DMA)
[ 815.240679] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff88012154a620
[ 815.240682] xhci_hcd 0000:01:00.0: Freeing ring at ffff880123abc6c0
[ 815.240685] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1864000 (virtual) 0xc1864000 (DMA)
[ 815.240688] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff88012154a860
[ 815.240691] xhci_hcd 0000:01:00.0: Freeing ring at ffff880123abc4e0
[ 815.240693] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1864400 (virtual) 0xc1864400 (DMA)
[ 815.240696] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff88012154a680
[ 815.240699] xhci_hcd 0000:01:00.0: Freeing ring at ffff880121c7a480
[ 815.240702] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1864800 (virtual) 0xc1864800 (DMA)
[ 815.240704] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff88012154a6e0
[ 815.240708] xhci_hcd 0000:01:00.0: Freeing ring at ffff880121c7a720
[ 815.240710] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037a37000 (virtual) 0x37a37000 (DMA)
[ 815.240713] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff88012154af60
[ 815.240718] xhci_hcd 0000:01:00.0: Cached old ring, 7 rings cached
[ 815.240721] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971060
[ 815.240723] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1821800 (virtual) 0xc1821800 (DMA)
[ 815.240727] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3320
[ 815.240730] xhci_hcd 0000:01:00.0: Freeing ring at ffff8800379712a0
[ 815.240733] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037b61000 (virtual) 0x37b61000 (DMA)
[ 815.240736] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc35c0
[ 815.240738] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7960
[ 815.240741] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037b61400 (virtual) 0x37b61400 (DMA)
[ 815.240744] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3480
[ 815.240747] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac79c0
[ 815.240749] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037b61800 (virtual) 0x37b61800 (DMA)
[ 815.240752] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3660
[ 815.240755] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7a20
[ 815.240758] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c18ce000 (virtual) 0xc18ce000 (DMA)
[ 815.240761] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3c40
[ 815.240763] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7a80
[ 815.240766] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c18ce400 (virtual) 0xc18ce400 (DMA)
[ 815.240769] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3220
[ 815.240771] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7b40
[ 815.240774] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c18ce800 (virtual) 0xc18ce800 (DMA)
[ 815.240777] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3280
[ 815.240780] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7ba0
[ 815.240783] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037a01000 (virtual) 0x37a01000 (DMA)
[ 815.240785] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3420
[ 815.240788] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7c00
[ 815.240791] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037a01400 (virtual) 0x37a01400 (DMA)
[ 815.240794] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3460
[ 815.240796] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7c60
[ 815.240799] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037a01800 (virtual) 0x37a01800 (DMA)
[ 815.240802] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc33a0
[ 815.240805] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7cc0
[ 815.240807] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c181d000 (virtual) 0xc181d000 (DMA)
[ 815.240810] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3300
[ 815.240813] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7d20
[ 815.240816] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c181d400 (virtual) 0xc181d400 (DMA)
[ 815.240818] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3260
[ 815.240821] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7d80
[ 815.240824] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c181d800 (virtual) 0xc181d800 (DMA)
[ 815.240827] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc32c0
[ 815.240829] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7de0
[ 815.240832] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037b30000 (virtual) 0x37b30000 (DMA)
[ 815.240835] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc32e0
[ 815.240838] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7e40
[ 815.240840] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037b30400 (virtual) 0x37b30400 (DMA)
[ 815.240843] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3840
[ 815.240846] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac75a0
[ 815.240849] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037b30800 (virtual) 0x37b30800 (DMA)
[ 815.240851] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc32a0
[ 815.240854] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7f00
[ 815.240857] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037b26000 (virtual) 0x37b26000 (DMA)
[ 815.240860] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3360
[ 815.240862] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac72a0
[ 815.240865] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037b26400 (virtual) 0x37b26400 (DMA)
[ 815.240868] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc38a0
[ 815.240871] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7660
[ 815.240873] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037b26800 (virtual) 0x37b26800 (DMA)
[ 815.240876] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc33c0
[ 815.240879] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7300
[ 815.240882] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1868000 (virtual) 0xc1868000 (DMA)
[ 815.240885] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3e80
[ 815.240887] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7360
[ 815.240890] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1868400 (virtual) 0xc1868400 (DMA)
[ 815.240893] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3e20
[ 815.240896] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac76c0
[ 815.240898] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1868800 (virtual) 0xc1868800 (DMA)
[ 815.240901] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3ae0
[ 815.240904] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7720
[ 815.240907] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037ba2000 (virtual) 0x37ba2000 (DMA)
[ 815.240910] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3ba0
[ 815.240912] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7780
[ 815.240915] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037ba2400 (virtual) 0x37ba2400 (DMA)
[ 815.240918] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3560
[ 815.240920] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7000
[ 815.240923] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037ba2800 (virtual) 0x37ba2800 (DMA)
[ 815.240926] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3aa0
[ 815.240929] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7060
[ 815.240931] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1896000 (virtual) 0xc1896000 (DMA)
[ 815.240934] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3400
[ 815.240937] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac70c0
[ 815.240940] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1896400 (virtual) 0xc1896400 (DMA)
[ 815.240942] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3940
[ 815.240945] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7120
[ 815.240948] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1896800 (virtual) 0xc1896800 (DMA)
[ 815.240951] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3960
[ 815.240954] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac73c0
[ 815.240956] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037857000 (virtual) 0x37857000 (DMA)
[ 815.240959] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3fc0
[ 815.240962] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7540
[ 815.240965] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037857400 (virtual) 0x37857400 (DMA)
[ 815.240967] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3e60
[ 815.240970] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037ac7840
[ 815.240973] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037857800 (virtual) 0x37857800 (DMA)
[ 815.240976] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3fe0
[ 815.240979] xhci_hcd 0000:01:00.0: Cached old ring, 8 rings cached
[ 815.240982] xhci_hcd 0000:01:00.0: Cached old ring, 9 rings cached
[ 815.240985] xhci_hcd 0000:01:00.0: Freeing ring at ffff8800379713c0
[ 815.240988] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c18d4400 (virtual) 0xc18d4400 (DMA)
[ 815.240991] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc37e0
[ 815.240994] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971240
[ 815.240997] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c18d4800 (virtual) 0xc18d4800 (DMA)
[ 815.240999] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3d80
[ 815.241003] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971180
[ 815.241005] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037a6d000 (virtual) 0x37a6d000 (DMA)
[ 815.241008] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc37a0
[ 815.241011] xhci_hcd 0000:01:00.0: Freeing ring at ffff8800379710c0
[ 815.241013] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037a6d400 (virtual) 0x37a6d400 (DMA)
[ 815.241016] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc37c0
[ 815.241019] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971840
[ 815.241022] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037a6d800 (virtual) 0x37a6d800 (DMA)
[ 815.241025] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3dc0
[ 815.241028] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971d80
[ 815.241030] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c180a000 (virtual) 0xc180a000 (DMA)
[ 815.241033] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3440
[ 815.241036] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971d20
[ 815.241039] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c180a400 (virtual) 0xc180a400 (DMA)
[ 815.241042] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3ea0
[ 815.241044] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971cc0
[ 815.241047] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c180a800 (virtual) 0xc180a800 (DMA)
[ 815.241050] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3f40
[ 815.241053] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971c60
[ 815.241055] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037a0f000 (virtual) 0x37a0f000 (DMA)
[ 815.241059] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc30e0
[ 815.241061] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971ba0
[ 815.241064] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037a0f400 (virtual) 0x37a0f400 (DMA)
[ 815.241067] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3780
[ 815.241070] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971c00
[ 815.241072] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037a0f800 (virtual) 0x37a0f800 (DMA)
[ 815.241075] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3ec0
[ 815.241078] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971540
[ 815.241081] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1835000 (virtual) 0xc1835000 (DMA)
[ 815.241084] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3720
[ 815.241086] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971f60
[ 815.241089] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1835400 (virtual) 0xc1835400 (DMA)
[ 815.241092] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3700
[ 815.241095] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971e40
[ 815.241098] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1835800 (virtual) 0xc1835800 (DMA)
[ 815.241100] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3020
[ 815.241103] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971de0
[ 815.241106] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037a43000 (virtual) 0x37a43000 (DMA)
[ 815.241109] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3760
[ 815.241111] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971f00
[ 815.241114] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037a43400 (virtual) 0x37a43400 (DMA)
[ 815.241117] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3040
[ 815.241120] xhci_hcd 0000:01:00.0: Freeing ring at ffff8800379717e0
[ 815.241122] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff880037a43800 (virtual) 0x37a43800 (DMA)
[ 815.241125] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3080
[ 815.241128] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971ea0
[ 815.241131] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c188d000 (virtual) 0xc188d000 (DMA)
[ 815.241134] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3160
[ 815.241136] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971780
[ 815.241139] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c188d400 (virtual) 0xc188d400 (DMA)
[ 815.241142] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3100
[ 815.241145] xhci_hcd 0000:01:00.0: Freeing ring at ffff8800379716c0
[ 815.241147] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c188d800 (virtual) 0xc188d800 (DMA)
[ 815.241150] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc31a0
[ 815.241153] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971720
[ 815.241156] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800379de000 (virtual) 0x379de000 (DMA)
[ 815.241159] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc31e0
[ 815.241161] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971b40
[ 815.241164] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800379de400 (virtual) 0x379de400 (DMA)
[ 815.241167] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3c00
[ 815.241170] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971ae0
[ 815.241172] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800379de800 (virtual) 0x379de800 (DMA)
[ 815.241175] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc30a0
[ 815.241178] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971a80
[ 815.241180] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff88003789b000 (virtual) 0x3789b000 (DMA)
[ 815.241184] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3200
[ 815.241186] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971a20
[ 815.241189] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff88003789b400 (virtual) 0x3789b400 (DMA)
[ 815.241192] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3600
[ 815.241195] xhci_hcd 0000:01:00.0: Freeing ring at ffff8800379719c0
[ 815.241197] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff88003789b800 (virtual) 0x3789b800 (DMA)
[ 815.241200] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3380
[ 815.241203] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971120
[ 815.241206] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c189d000 (virtual) 0xc189d000 (DMA)
[ 815.241209] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3620
[ 815.241211] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971960
[ 815.241214] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c189d400 (virtual) 0xc189d400 (DMA)
[ 815.241217] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3000
[ 815.241220] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971420
[ 815.241222] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c189d800 (virtual) 0xc189d800 (DMA)
[ 815.241225] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3bc0
[ 815.241228] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971600
[ 815.241231] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1821000 (virtual) 0xc1821000 (DMA)
[ 815.241233] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3640
[ 815.241236] xhci_hcd 0000:01:00.0: Freeing ring at ffff880037971300
[ 815.241239] xhci_hcd 0000:01:00.0: Freeing DMA segment at ffff8800c1821400 (virtual) 0xc1821400 (DMA)
[ 815.241242] xhci_hcd 0000:01:00.0: Freeing priv segment structure at ffff880037bc3c20
[ 815.241245] xhci_hcd 0000:01:00.0: Cached old ring, 10 rings cached
[ 815.241248] xhci_hcd 0000:01:00.0: Output context after successful reset device cmd:
[ 815.241251] xhci_hcd 0000:01:00.0: Slot Context:
[ 815.241254] xhci_hcd 0000:01:00.0: @ffff8800c186d000 (virt) @c186d000 (dma) 0x28400000 - dev_info
[ 815.241257] xhci_hcd 0000:01:00.0: @ffff8800c186d004 (virt) @c186d004 (dma) 0x010000 - dev_info2
[ 815.241261] xhci_hcd 0000:01:00.0: @ffff8800c186d008 (virt) @c186d008 (dma) 0x000000 - tt_info
[ 815.241264] xhci_hcd 0000:01:00.0: @ffff8800c186d00c (virt) @c186d00c (dma) 0x8000000 - dev_state
[ 815.241267] xhci_hcd 0000:01:00.0: @ffff8800c186d010 (virt) @c186d010 (dma) 0x000000 - rsvd[0]
[ 815.241270] xhci_hcd 0000:01:00.0: @ffff8800c186d014 (virt) @c186d014 (dma) 0x000000 - rsvd[1]
[ 815.241273] xhci_hcd 0000:01:00.0: @ffff8800c186d018 (virt) @c186d018 (dma) 0x000000 - rsvd[2]
[ 815.241276] xhci_hcd 0000:01:00.0: @ffff8800c186d01c (virt) @c186d01c (dma) 0x000000 - rsvd[3]
[ 815.241279] xhci_hcd 0000:01:00.0: Endpoint 00 Context:
[ 815.241282] xhci_hcd 0000:01:00.0: @ffff8800c186d020 (virt) @c186d020 (dma) 0x000001 - ep_info
[ 815.241285] xhci_hcd 0000:01:00.0: @ffff8800c186d024 (virt) @c186d024 (dma) 0x2000026 - ep_info2
[ 815.241288] xhci_hcd 0000:01:00.0: @ffff8800c186d028 (virt) @c186d028 (dma) 0xc18403b1 - deq
[ 815.241291] xhci_hcd 0000:01:00.0: @ffff8800c186d030 (virt) @c186d030 (dma) 0x000000 - tx_info
[ 815.241294] xhci_hcd 0000:01:00.0: @ffff8800c186d034 (virt) @c186d034 (dma) 0x000000 - rsvd[0]
[ 815.241297] xhci_hcd 0000:01:00.0: @ffff8800c186d038 (virt) @c186d038 (dma) 0x000000 - rsvd[1]
[ 815.241300] xhci_hcd 0000:01:00.0: @ffff8800c186d03c (virt) @c186d03c (dma) 0x000000 - rsvd[2]
[ 815.241303] xhci_hcd 0000:01:00.0: Endpoint 01 Context:
[ 815.241306] xhci_hcd 0000:01:00.0: @ffff8800c186d040 (virt) @c186d040 (dma) 0x009000 - ep_info
[ 815.241309] xhci_hcd 0000:01:00.0: @ffff8800c186d044 (virt) @c186d044 (dma) 0x4000016 - ep_info2
[ 815.241312] xhci_hcd 0000:01:00.0: @ffff8800c186d048 (virt) @c186d048 (dma) 0xc188f000 - deq
[ 815.241315] xhci_hcd 0000:01:00.0: @ffff8800c186d050 (virt) @c186d050 (dma) 0x000000 - tx_info
[ 815.241318] xhci_hcd 0000:01:00.0: @ffff8800c186d054 (virt) @c186d054 (dma) 0x000000 - rsvd[0]
[ 815.241321] xhci_hcd 0000:01:00.0: @ffff8800c186d058 (virt) @c186d058 (dma) 0x000000 - rsvd[1]
[ 815.241324] xhci_hcd 0000:01:00.0: @ffff8800c186d05c (virt) @c186d05c (dma) 0x000000 - rsvd[2]
[ 815.241327] xhci_hcd 0000:01:00.0: Endpoint 02 Context:
[ 815.241329] xhci_hcd 0000:01:00.0: @ffff8800c186d060 (virt) @c186d060 (dma) 0x009000 - ep_info
[ 815.241332] xhci_hcd 0000:01:00.0: @ffff8800c186d064 (virt) @c186d064 (dma) 0x4000036 - ep_info2
[ 815.241335] xhci_hcd 0000:01:00.0: @ffff8800c186d068 (virt) @c186d068 (dma) 0xc1817100 - deq
[ 815.241338] xhci_hcd 0000:01:00.0: @ffff8800c186d070 (virt) @c186d070 (dma) 0x000000 - tx_info
[ 815.241342] xhci_hcd 0000:01:00.0: @ffff8800c186d074 (virt) @c186d074 (dma) 0x000000 - rsvd[0]
[ 815.241345] xhci_hcd 0000:01:00.0: @ffff8800c186d078 (virt) @c186d078 (dma) 0x000000 - rsvd[1]
[ 815.241348] xhci_hcd 0000:01:00.0: @ffff8800c186d07c (virt) @c186d07c (dma) 0x000000 - rsvd[2]
[ 815.241350] xhci_hcd 0000:01:00.0: Endpoint 03 Context:
[ 815.241353] xhci_hcd 0000:01:00.0: @ffff8800c186d080 (virt) @c186d080 (dma) 0x000000 - ep_info
[ 815.241356] xhci_hcd 0000:01:00.0: @ffff8800c186d084 (virt) @c186d084 (dma) 0x4000016 - ep_info2
[ 815.241359] xhci_hcd 0000:01:00.0: @ffff8800c186d088 (virt) @c186d088 (dma) 0xc18d4011 - deq
[ 815.241362] xhci_hcd 0000:01:00.0: @ffff8800c186d090 (virt) @c186d090 (dma) 0x000000 - tx_info
[ 815.241365] xhci_hcd 0000:01:00.0: @ffff8800c186d094 (virt) @c186d094 (dma) 0x000000 - rsvd[0]
[ 815.241368] xhci_hcd 0000:01:00.0: @ffff8800c186d098 (virt) @c186d098 (dma) 0x000000 - rsvd[1]
[ 815.241371] xhci_hcd 0000:01:00.0: @ffff8800c186d09c (virt) @c186d09c (dma) 0x000000 - rsvd[2]
[ 815.241374] xhci_hcd 0000:01:00.0: Endpoint 04 Context:
[ 815.241376] xhci_hcd 0000:01:00.0: @ffff8800c186d0a0 (virt) @c186d0a0 (dma) 0x009000 - ep_info
[ 815.241379] xhci_hcd 0000:01:00.0: @ffff8800c186d0a4 (virt) @c186d0a4 (dma) 0x4000036 - ep_info2
[ 815.241383] xhci_hcd 0000:01:00.0: @ffff8800c186d0a8 (virt) @c186d0a8 (dma) 0xc1817000 - deq
[ 815.241385] xhci_hcd 0000:01:00.0: @ffff8800c186d0b0 (virt) @c186d0b0 (dma) 0x000000 - tx_info
[ 815.241389] xhci_hcd 0000:01:00.0: @ffff8800c186d0b4 (virt) @c186d0b4 (dma) 0x000000 - rsvd[0]
[ 815.241392] xhci_hcd 0000:01:00.0: @ffff8800c186d0b8 (virt) @c186d0b8 (dma) 0x000000 - rsvd[1]
[ 815.241395] xhci_hcd 0000:01:00.0: @ffff8800c186d0bc (virt) @c186d0bc (dma) 0x000000 - rsvd[2]
[ 815.241401] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c420, 32'h201201, 4'hf);
[ 815.241406] xhci_hcd 0000:01:00.0: clear port reset change, actual port 0 status = 0x1203
[ 815.241411] xhci_hcd 0000:01:00.0: Slot ID 1 Input Context:
[ 815.241414] xhci_hcd 0000:01:00.0: @ffff880037949000 (virt) @37949000 (dma) 0x000000 - drop flags
[ 815.241417] xhci_hcd 0000:01:00.0: @ffff880037949004 (virt) @37949004 (dma) 0x000000 - add flags
[ 815.241420] xhci_hcd 0000:01:00.0: @ffff880037949008 (virt) @37949008 (dma) 0x000000 - rsvd2[0]
[ 815.241423] xhci_hcd 0000:01:00.0: @ffff88003794900c (virt) @3794900c (dma) 0x000000 - rsvd2[1]
[ 815.241426] xhci_hcd 0000:01:00.0: @ffff880037949010 (virt) @37949010 (dma) 0x000000 - rsvd2[2]
[ 815.241429] xhci_hcd 0000:01:00.0: @ffff880037949014 (virt) @37949014 (dma) 0x000000 - rsvd2[3]
[ 815.241432] xhci_hcd 0000:01:00.0: @ffff880037949018 (virt) @37949018 (dma) 0x000000 - rsvd2[4]
[ 815.241435] xhci_hcd 0000:01:00.0: @ffff88003794901c (virt) @3794901c (dma) 0x000000 - rsvd2[5]
[ 815.241438] xhci_hcd 0000:01:00.0: Slot Context:
[ 815.241441] xhci_hcd 0000:01:00.0: @ffff880037949020 (virt) @37949020 (dma) 0x8400000 - dev_info
[ 815.241444] xhci_hcd 0000:01:00.0: @ffff880037949024 (virt) @37949024 (dma) 0x010000 - dev_info2
[ 815.241447] xhci_hcd 0000:01:00.0: @ffff880037949028 (virt) @37949028 (dma) 0x000000 - tt_info
[ 815.241450] xhci_hcd 0000:01:00.0: @ffff88003794902c (virt) @3794902c (dma) 0x000000 - dev_state
[ 815.241453] xhci_hcd 0000:01:00.0: @ffff880037949030 (virt) @37949030 (dma) 0x000000 - rsvd[0]
[ 815.241456] xhci_hcd 0000:01:00.0: @ffff880037949034 (virt) @37949034 (dma) 0x000000 - rsvd[1]
[ 815.241459] xhci_hcd 0000:01:00.0: @ffff880037949038 (virt) @37949038 (dma) 0x000000 - rsvd[2]
[ 815.241462] xhci_hcd 0000:01:00.0: @ffff88003794903c (virt) @3794903c (dma) 0x000000 - rsvd[3]
[ 815.241465] xhci_hcd 0000:01:00.0: Endpoint 00 Context:
[ 815.241468] xhci_hcd 0000:01:00.0: @ffff880037949040 (virt) @37949040 (dma) 0x000000 - ep_info
[ 815.241471] xhci_hcd 0000:01:00.0: @ffff880037949044 (virt) @37949044 (dma) 0x2000026 - ep_info2
[ 815.241474] xhci_hcd 0000:01:00.0: @ffff880037949048 (virt) @37949048 (dma) 0xc1840120 - deq
[ 815.241477] xhci_hcd 0000:01:00.0: @ffff880037949050 (virt) @37949050 (dma) 0x000000 - tx_info
[ 815.241480] xhci_hcd 0000:01:00.0: @ffff880037949054 (virt) @37949054 (dma) 0x000000 - rsvd[0]
[ 815.241483] xhci_hcd 0000:01:00.0: @ffff880037949058 (virt) @37949058 (dma) 0x000000 - rsvd[1]
[ 815.241486] xhci_hcd 0000:01:00.0: @ffff88003794905c (virt) @3794905c (dma) 0x000000 - rsvd[2]
[ 815.241489] xhci_hcd 0000:01:00.0: Endpoint 01 Context:
[ 815.241491] xhci_hcd 0000:01:00.0: @ffff880037949060 (virt) @37949060 (dma) 0x000000 - ep_info
[ 815.241494] xhci_hcd 0000:01:00.0: @ffff880037949064 (virt) @37949064 (dma) 0x000000 - ep_info2
[ 815.241497] xhci_hcd 0000:01:00.0: @ffff880037949068 (virt) @37949068 (dma) 0x000000 - deq
[ 815.241500] xhci_hcd 0000:01:00.0: @ffff880037949070 (virt) @37949070 (dma) 0x000000 - tx_info
[ 815.241503] xhci_hcd 0000:01:00.0: @ffff880037949074 (virt) @37949074 (dma) 0x000000 - rsvd[0]
[ 815.241506] xhci_hcd 0000:01:00.0: @ffff880037949078 (virt) @37949078 (dma) 0x000000 - rsvd[1]
[ 815.241509] xhci_hcd 0000:01:00.0: @ffff88003794907c (virt) @3794907c (dma) 0x000000 - rsvd[2]
[ 815.241512] xhci_hcd 0000:01:00.0: Endpoint 02 Context:
[ 815.241515] xhci_hcd 0000:01:00.0: @ffff880037949080 (virt) @37949080 (dma) 0x000000 - ep_info
[ 815.241518] xhci_hcd 0000:01:00.0: @ffff880037949084 (virt) @37949084 (dma) 0x000000 - ep_info2
[ 815.241521] xhci_hcd 0000:01:00.0: @ffff880037949088 (virt) @37949088 (dma) 0x000000 - deq
[ 815.241524] xhci_hcd 0000:01:00.0: @ffff880037949090 (virt) @37949090 (dma) 0x000000 - tx_info
[ 815.241527] xhci_hcd 0000:01:00.0: @ffff880037949094 (virt) @37949094 (dma) 0x000000 - rsvd[0]
[ 815.241530] xhci_hcd 0000:01:00.0: @ffff880037949098 (virt) @37949098 (dma) 0x000000 - rsvd[1]
[ 815.241533] xhci_hcd 0000:01:00.0: @ffff88003794909c (virt) @3794909c (dma) 0x000000 - rsvd[2]
[ 815.241536] xhci_hcd 0000:01:00.0: Endpoint state = 0x1
[ 815.241538] xhci_hcd 0000:01:00.0: Command ring enq = 0x3781b390 (DMA)
[ 815.241540] xhci_hcd 0000:01:00.0: // Ding dong!
[ 815.241543] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c800, 32'h0, 4'hf);
[ 853.920008] xhci_hcd 0000:01:00.0: Poll event ring: 4295022688
[ 853.920013] xhci_hcd 0000:01:00.0: op reg status = 0x0
[ 853.920017] xhci_hcd 0000:01:00.0: ir_set 0 pending = 0x2
[ 853.920019] xhci_hcd 0000:01:00.0: HC error bitmask = 0x204
[ 853.920021] xhci_hcd 0000:01:00.0: Event ring:
[ 853.920025] xhci_hcd 0000:01:00.0: @000000003781b400 3781b9c0 00000000 01000000 01028000
[ 853.920028] xhci_hcd 0000:01:00.0: @000000003781b410 c185f6b0 00000000 01000000 01038000
[ 853.920031] xhci_hcd 0000:01:00.0: @000000003781b420 3781b9d0 00000000 01000000 01028000
[ 853.920034] xhci_hcd 0000:01:00.0: @000000003781b430 c185f6c0 00000000 01000000 01038000
[ 853.920037] xhci_hcd 0000:01:00.0: @000000003781b440 3781b320 00000000 01000000 01008400
[ 853.920041] xhci_hcd 0000:01:00.0: @000000003781b450 3781b330 00000000 01000000 01008400
[ 853.920044] xhci_hcd 0000:01:00.0: @000000003781b460 c1840110 00000000 01000000 01018000
[ 853.920047] xhci_hcd 0000:01:00.0: @000000003781b470 3781b340 00000000 01000000 01008400
[ 853.920050] xhci_hcd 0000:01:00.0: @000000003781b480 00000000 00000000 04000000 01058000
[ 853.920053] xhci_hcd 0000:01:00.0: @000000003781b490 00000000 00000000 04000000 01038000
[ 853.920056] xhci_hcd 0000:01:00.0: @000000003781b4a0 c18d4000 00000000 04000020 01048000
[ 853.920059] xhci_hcd 0000:01:00.0: @000000003781b4b0 3781b350 00000000 01000000 01008400
[ 853.920062] xhci_hcd 0000:01:00.0: @000000003781b4c0 3781b360 00000000 01000000 01008400
[ 853.920065] xhci_hcd 0000:01:00.0: @000000003781b4d0 01000000 00000000 01000000 00008800
[ 853.920068] xhci_hcd 0000:01:00.0: @000000003781b4e0 3781b370 00000000 01000000 01008400
[ 853.920071] xhci_hcd 0000:01:00.0: @000000003781b4f0 c185f520 00000000 01000000 01038001
[ 853.920075] xhci_hcd 0000:01:00.0: @000000003781b500 3781b840 00000000 01000000 01028001
[ 853.920078] xhci_hcd 0000:01:00.0: @000000003781b510 c185f530 00000000 01000000 01038001
[ 853.920081] xhci_hcd 0000:01:00.0: @000000003781b520 3781b850 00000000 01000000 01028001
[ 853.920084] xhci_hcd 0000:01:00.0: @000000003781b530 c185f540 00000000 01000000 01038001
[ 853.920087] xhci_hcd 0000:01:00.0: @000000003781b540 3781b860 00000000 01000000 01028001
[ 853.920090] xhci_hcd 0000:01:00.0: @000000003781b550 c185f550 00000000 01000000 01038001
[ 853.920093] xhci_hcd 0000:01:00.0: @000000003781b560 3781b870 00000000 01000000 01028001
[ 853.920096] xhci_hcd 0000:01:00.0: @000000003781b570 c185f560 00000000 01000000 01038001
[ 853.920099] xhci_hcd 0000:01:00.0: @000000003781b580 3781b880 00000000 01000000 01028001
[ 853.920102] xhci_hcd 0000:01:00.0: @000000003781b590 c185f570 00000000 01000000 01038001
[ 853.920105] xhci_hcd 0000:01:00.0: @000000003781b5a0 3781b890 00000000 01000000 01028001
[ 853.920109] xhci_hcd 0000:01:00.0: @000000003781b5b0 c185f580 00000000 01000000 01038001
[ 853.920112] xhci_hcd 0000:01:00.0: @000000003781b5c0 3781b8a0 00000000 01000000 01028001
[ 853.920115] xhci_hcd 0000:01:00.0: @000000003781b5d0 c185f590 00000000 01000000 01038001
[ 853.920118] xhci_hcd 0000:01:00.0: @000000003781b5e0 3781b8b0 00000000 01000000 01028001
[ 853.920121] xhci_hcd 0000:01:00.0: @000000003781b5f0 c185f5a0 00000000 01000000 01038001
[ 853.920124] xhci_hcd 0000:01:00.0: @000000003781b600 3781b8c0 00000000 01000000 01028001
[ 853.920127] xhci_hcd 0000:01:00.0: @000000003781b610 c185f5b0 00000000 01000000 01038001
[ 853.920130] xhci_hcd 0000:01:00.0: @000000003781b620 3781b8d0 00000000 01000000 01028001
[ 853.920133] xhci_hcd 0000:01:00.0: @000000003781b630 c185f5c0 00000000 01000000 01038001
[ 853.920137] xhci_hcd 0000:01:00.0: @000000003781b640 3781b8e0 00000000 01000000 01028001
[ 853.920140] xhci_hcd 0000:01:00.0: @000000003781b650 c185f5d0 00000000 01000000 01038001
[ 853.920143] xhci_hcd 0000:01:00.0: @000000003781b660 3781b8f0 00000000 01000000 01028001
[ 853.920146] xhci_hcd 0000:01:00.0: @000000003781b670 c185f5e0 00000000 01000000 01038001
[ 853.920149] xhci_hcd 0000:01:00.0: @000000003781b680 3781b900 00000000 01000000 01028001
[ 853.920152] xhci_hcd 0000:01:00.0: @000000003781b690 c185f5f0 00000000 01000000 01038001
[ 853.920155] xhci_hcd 0000:01:00.0: @000000003781b6a0 3781b910 00000000 01000000 01028001
[ 853.920158] xhci_hcd 0000:01:00.0: @000000003781b6b0 c185f600 00000000 01000000 01038001
[ 853.920161] xhci_hcd 0000:01:00.0: @000000003781b6c0 3781b920 00000000 01000000 01028001
[ 853.920164] xhci_hcd 0000:01:00.0: @000000003781b6d0 c185f610 00000000 01000000 01038001
[ 853.920167] xhci_hcd 0000:01:00.0: @000000003781b6e0 3781b930 00000000 01000000 01028001
[ 853.920170] xhci_hcd 0000:01:00.0: @000000003781b6f0 c185f620 00000000 01000000 01038001
[ 853.920173] xhci_hcd 0000:01:00.0: @000000003781b700 3781b940 00000000 01000000 01028001
[ 853.920177] xhci_hcd 0000:01:00.0: @000000003781b710 c185f630 00000000 01000000 01038001
[ 853.920180] xhci_hcd 0000:01:00.0: @000000003781b720 3781b950 00000000 01000000 01028001
[ 853.920183] xhci_hcd 0000:01:00.0: @000000003781b730 c185f640 00000000 01000000 01038001
[ 853.920186] xhci_hcd 0000:01:00.0: @000000003781b740 3781b960 00000000 01000000 01028001
[ 853.920189] xhci_hcd 0000:01:00.0: @000000003781b750 c185f650 00000000 01000000 01038001
[ 853.920192] xhci_hcd 0000:01:00.0: @000000003781b760 3781b970 00000000 01000000 01028001
[ 853.920195] xhci_hcd 0000:01:00.0: @000000003781b770 c185f660 00000000 01000000 01038001
[ 853.920198] xhci_hcd 0000:01:00.0: @000000003781b780 3781b980 00000000 01000000 01028001
[ 853.920201] xhci_hcd 0000:01:00.0: @000000003781b790 c185f670 00000000 01000000 01038001
[ 853.920204] xhci_hcd 0000:01:00.0: @000000003781b7a0 3781b990 00000000 01000000 01028001
[ 853.920207] xhci_hcd 0000:01:00.0: @000000003781b7b0 c185f680 00000000 01000000 01038001
[ 853.920210] xhci_hcd 0000:01:00.0: @000000003781b7c0 3781b9a0 00000000 01000000 01028001
[ 853.920213] xhci_hcd 0000:01:00.0: @000000003781b7d0 c185f690 00000000 01000000 01038001
[ 853.920216] xhci_hcd 0000:01:00.0: @000000003781b7e0 3781b9b0 00000000 01000000 01028001
[ 853.920220] xhci_hcd 0000:01:00.0: @000000003781b7f0 c185f6a0 00000000 01000000 01038001
[ 853.920223] xhci_hcd 0000:01:00.0: Ring deq = ffff88003781b4f0 (virt), 0x3781b4f0 (dma)
[ 853.920226] xhci_hcd 0000:01:00.0: Ring deq updated 463 times
[ 853.920228] xhci_hcd 0000:01:00.0: Ring enq = ffff88003781b400 (virt), 0x3781b400 (dma)
[ 853.920231] xhci_hcd 0000:01:00.0: Ring enq updated 0 times
[ 853.920236] xhci_hcd 0000:01:00.0: ERST deq = 64'h3781b4f0
[ 853.920238] xhci_hcd 0000:01:00.0: Command ring:
[ 853.920241] xhci_hcd 0000:01:00.0: @000000003781b000 00000000 00000000 00000000 0000c401
[ 853.920244] xhci_hcd 0000:01:00.0: @000000003781b010 00000000 00000000 00000000 00002401
[ 853.920247] xhci_hcd 0000:01:00.0: @000000003781b020 00000000 00000000 00000000 01004401
[ 853.920250] xhci_hcd 0000:01:00.0: @000000003781b030 c186d000 00000000 00000000 01002c01
[ 853.920253] xhci_hcd 0000:01:00.0: @000000003781b040 c186d000 00000000 00000000 01003001
[ 853.920256] xhci_hcd 0000:01:00.0: @000000003781b050 00000000 00000000 00000000 01033801
[ 853.920259] xhci_hcd 0000:01:00.0: @000000003781b060 c185f0a1 00000000 00000000 01034001
[ 853.920262] xhci_hcd 0000:01:00.0: @000000003781b070 00000000 00000000 00000000 01033c01
[ 853.920265] xhci_hcd 0000:01:00.0: @000000003781b080 00000000 00000000 00000000 01004401
[ 853.920268] xhci_hcd 0000:01:00.0: @000000003781b090 c186d000 00000000 00000000 01002c01
[ 853.920271] xhci_hcd 0000:01:00.0: @000000003781b0a0 c186d000 00000000 00000000 01003001
[ 853.920274] xhci_hcd 0000:01:00.0: @000000003781b0b0 00000000 00000000 00000000 01033801
[ 853.920277] xhci_hcd 0000:01:00.0: @000000003781b0c0 c185f811 00000000 00000000 01034001
[ 853.920280] xhci_hcd 0000:01:00.0: @000000003781b0d0 00000000 00000000 00000000 01033801
[ 853.920283] xhci_hcd 0000:01:00.0: @000000003781b0e0 c185f871 00000000 00000000 01034001
[ 853.920286] xhci_hcd 0000:01:00.0: @000000003781b0f0 00000000 00000000 00000000 01033801
[ 853.920290] xhci_hcd 0000:01:00.0: @000000003781b100 c185f8e1 00000000 00000000 01034001
[ 853.920293] xhci_hcd 0000:01:00.0: @000000003781b110 00000000 00000000 00000000 01033801
[ 853.920296] xhci_hcd 0000:01:00.0: @000000003781b120 c185f911 00000000 00000000 01034001
[ 853.920299] xhci_hcd 0000:01:00.0: @000000003781b130 00000000 00000000 00000000 01033c01
[ 853.920302] xhci_hcd 0000:01:00.0: @000000003781b140 c186d000 00000000 00000000 01003001
[ 853.920305] xhci_hcd 0000:01:00.0: @000000003781b150 00000000 00000000 00000000 01002801
[ 853.920308] xhci_hcd 0000:01:00.0: @000000003781b160 00000000 00000000 00000000 00002401
[ 853.920311] xhci_hcd 0000:01:00.0: @000000003781b170 00000000 00000000 00000000 01004401
[ 853.920314] xhci_hcd 0000:01:00.0: @000000003781b180 37949000 00000000 00000000 01002c01
[ 853.920317] xhci_hcd 0000:01:00.0: @000000003781b190 37949000 00000000 00000000 01003001
[ 853.920320] xhci_hcd 0000:01:00.0: @000000003781b1a0 00000000 00000000 00000000 01033801
[ 853.920323] xhci_hcd 0000:01:00.0: @000000003781b1b0 c18404a1 00000000 00000000 01034001
[ 853.920326] xhci_hcd 0000:01:00.0: @000000003781b1c0 00000000 00000000 00000000 01033c01
[ 853.920329] xhci_hcd 0000:01:00.0: @000000003781b1d0 00000000 00000000 00000000 01004401
[ 853.920332] xhci_hcd 0000:01:00.0: @000000003781b1e0 37949000 00000000 00000000 01002c01
[ 853.920335] xhci_hcd 0000:01:00.0: @000000003781b1f0 37949000 00000000 00000000 01003001
[ 853.920338] xhci_hcd 0000:01:00.0: @000000003781b200 00000000 00000000 00000000 01033801
[ 853.920341] xhci_hcd 0000:01:00.0: @000000003781b210 c185f811 00000000 00000000 01034001
[ 853.920344] xhci_hcd 0000:01:00.0: @000000003781b220 00000000 00000000 00000000 01033801
[ 853.920347] xhci_hcd 0000:01:00.0: @000000003781b230 c185f871 00000000 00000000 01034001
[ 853.920350] xhci_hcd 0000:01:00.0: @000000003781b240 00000000 00000000 00000000 01033801
[ 853.920353] xhci_hcd 0000:01:00.0: @000000003781b250 c185f8e1 00000000 00000000 01034001
[ 853.920356] xhci_hcd 0000:01:00.0: @000000003781b260 00000000 00000000 00000000 01033801
[ 853.920359] xhci_hcd 0000:01:00.0: @000000003781b270 c185f911 00000000 00000000 01034001
[ 853.920362] xhci_hcd 0000:01:00.0: @000000003781b280 00000000 00000000 00000000 01033c01
[ 853.920365] xhci_hcd 0000:01:00.0: @000000003781b290 00000000 00000000 00000000 01004401
[ 853.920369] xhci_hcd 0000:01:00.0: @000000003781b2a0 37949000 00000000 00000000 01002c01
[ 853.920372] xhci_hcd 0000:01:00.0: @000000003781b2b0 37949000 00000000 00000000 01003001
[ 853.920375] xhci_hcd 0000:01:00.0: @000000003781b2c0 00000000 00000000 00000000 01033801
[ 853.920378] xhci_hcd 0000:01:00.0: @000000003781b2d0 c185f411 00000000 00000000 01034001
[ 853.920381] xhci_hcd 0000:01:00.0: @000000003781b2e0 00000000 00000000 00000000 01033801
[ 853.920384] xhci_hcd 0000:01:00.0: @000000003781b2f0 c185f471 00000000 00000000 01034001
[ 853.920387] xhci_hcd 0000:01:00.0: @000000003781b300 00000000 00000000 00000000 01033801
[ 853.920390] xhci_hcd 0000:01:00.0: @000000003781b310 c185f4b1 00000000 00000000 01034001
[ 853.920393] xhci_hcd 0000:01:00.0: @000000003781b320 37949000 00000000 00000000 01003001
[ 853.920396] xhci_hcd 0000:01:00.0: @000000003781b330 37949000 00000000 00000000 01003001
[ 853.920399] xhci_hcd 0000:01:00.0: @000000003781b340 c1838000 00000000 00000000 01003001
[ 853.920402] xhci_hcd 0000:01:00.0: @000000003781b350 00000000 00000000 00000000 01043801
[ 853.920405] xhci_hcd 0000:01:00.0: @000000003781b360 c18d4011 00000000 00000000 01044001
[ 853.920408] xhci_hcd 0000:01:00.0: @000000003781b370 00000000 00000000 00000000 01004401
[ 853.920411] xhci_hcd 0000:01:00.0: @000000003781b380 37949000 00000000 00000000 01002c01
[ 853.920414] xhci_hcd 0000:01:00.0: @000000003781b390 00000000 00000000 00000000 00000000
[ 853.920417] xhci_hcd 0000:01:00.0: @000000003781b3a0 00000000 00000000 00000000 00000000
[ 853.920420] xhci_hcd 0000:01:00.0: @000000003781b3b0 00000000 00000000 00000000 00000000
[ 853.920423] xhci_hcd 0000:01:00.0: @000000003781b3c0 00000000 00000000 00000000 00000000
[ 853.920426] xhci_hcd 0000:01:00.0: @000000003781b3d0 00000000 00000000 00000000 00000000
[ 853.920429] xhci_hcd 0000:01:00.0: @000000003781b3e0 00000000 00000000 00000000 00000000
[ 853.920432] xhci_hcd 0000:01:00.0: @000000003781b3f0 3781b000 00000000 00000000 00001802
[ 853.920435] xhci_hcd 0000:01:00.0: Ring deq = ffff88003781b380 (virt), 0x3781b380 (dma)
[ 853.920438] xhci_hcd 0000:01:00.0: Ring deq updated 56 times
[ 853.920440] xhci_hcd 0000:01:00.0: Ring enq = ffff88003781b390 (virt), 0x3781b390 (dma)
[ 853.920443] xhci_hcd 0000:01:00.0: Ring enq updated 57 times
[ 853.920448] xhci_hcd 0000:01:00.0: // xHC command ring deq ptr low bits + flags = @00000008
[ 853.920450] xhci_hcd 0000:01:00.0: // xHC command ring deq ptr high bits = @00000000
[ 853.920453] xhci_hcd 0000:01:00.0: Dev 1 endpoint ring 0:
[ 853.920456] xhci_hcd 0000:01:00.0: @00000000c1840000 378e88a0 00000000 00000012 00010c04
[ 853.920460] xhci_hcd 0000:01:00.0: @00000000c1840010 00000000 00000000 00000000 00001020
[ 853.920463] xhci_hcd 0000:01:00.0: @00000000c1840020 02000680 002c0000 00000008 00000840
[ 853.920466] xhci_hcd 0000:01:00.0: @00000000c1840030 0048bf00 00000001 0000002c 00010c04
[ 853.920469] xhci_hcd 0000:01:00.0: @00000000c1840040 00000000 00000000 00000000 00001020
[ 853.920472] xhci_hcd 0000:01:00.0: @00000000c1840050 02010680 00560000 00000008 00000840
[ 853.920475] xhci_hcd 0000:01:00.0: @00000000c1840060 0048bf00 00000001 00000056 00010c04
[ 853.920478] xhci_hcd 0000:01:00.0: @00000000c1840070 00000000 00000000 00000000 00001020
[ 853.920481] xhci_hcd 0000:01:00.0: @00000000c1840080 00010900 00000000 00000008 00000840
[ 853.920484] xhci_hcd 0000:01:00.0: @00000000c1840090 00000000 00000000 00000000 00011020
[ 853.920487] xhci_hcd 0000:01:00.0: @00000000c18400a0 00000102 00000081 00000008 00000840
[ 853.920490] xhci_hcd 0000:01:00.0: @00000000c18400b0 00000000 00000000 00000000 00011020
[ 853.920493] xhci_hcd 0000:01:00.0: @00000000c18400c0 00000102 00000081 00000008 00000840
[ 853.920496] xhci_hcd 0000:01:00.0: @00000000c18400d0 00000000 00000000 00000000 00011020
[ 853.920500] xhci_hcd 0000:01:00.0: @00000000c18400e0 00000102 00000081 00000008 00000840
[ 853.920503] xhci_hcd 0000:01:00.0: @00000000c18400f0 00000000 00000000 00000000 00011020
[ 853.920506] xhci_hcd 0000:01:00.0: @00000000c1840100 00020900 00000000 00000008 00000840
[ 853.920509] xhci_hcd 0000:01:00.0: @00000000c1840110 00000000 00000000 00000000 00011020
[ 853.920512] xhci_hcd 0000:01:00.0: @00000000c1840120 03000680 00ff0000 00000008 00000841
[ 853.920515] xhci_hcd 0000:01:00.0: @00000000c1840130 22a38400 00000001 000000ff 00010c05
[ 853.920518] xhci_hcd 0000:01:00.0: @00000000c1840140 00000000 00000000 00000000 00001021
[ 853.920521] xhci_hcd 0000:01:00.0: @00000000c1840150 03030680 00ff0409 00000008 00000841
[ 853.920524] xhci_hcd 0000:01:00.0: @00000000c1840160 22a38400 00000001 000000ff 00010c05
[ 853.920527] xhci_hcd 0000:01:00.0: @00000000c1840170 00000000 00000000 00000000 00001021
[ 853.920530] xhci_hcd 0000:01:00.0: @00000000c1840180 03020680 00ff0409 00000008 00000841
[ 853.920534] xhci_hcd 0000:01:00.0: @00000000c1840190 22a38400 00000001 000000ff 00010c05
[ 853.920537] xhci_hcd 0000:01:00.0: @00000000c18401a0 00000000 00000000 00000000 00001021
[ 853.920540] xhci_hcd 0000:01:00.0: @00000000c18401b0 00010900 00000000 00000008 00000841
[ 853.920543] xhci_hcd 0000:01:00.0: @00000000c18401c0 00000000 00000000 00000000 00011021
[ 853.920546] xhci_hcd 0000:01:00.0: @00000000c18401d0 03010680 00ff0409 00000008 00000841
[ 853.920549] xhci_hcd 0000:01:00.0: @00000000c18401e0 22a39400 00000001 000000ff 00010c05
[ 853.920552] xhci_hcd 0000:01:00.0: @00000000c18401f0 00000000 00000000 00000000 00001021
[ 853.920555] xhci_hcd 0000:01:00.0: @00000000c1840200 0000fea1 00010000 00000008 00000841
[ 853.920558] xhci_hcd 0000:01:00.0: @00000000c1840210 c1802000 00000000 00000001 00010c05
[ 853.920561] xhci_hcd 0000:01:00.0: @00000000c1840220 00000000 00000000 00000000 00001021
[ 853.920564] xhci_hcd 0000:01:00.0: @00000000c1840230 00000102 00000081 00000008 00000841
[ 853.920567] xhci_hcd 0000:01:00.0: @00000000c1840240 00000000 00000000 00000000 00011021
[ 853.920570] xhci_hcd 0000:01:00.0: @00000000c1840250 01000680 00080000 00000008 00000841
[ 853.920573] xhci_hcd 0000:01:00.0: @00000000c1840260 21a32d00 00000001 00000008 00010c05
[ 853.920577] xhci_hcd 0000:01:00.0: @00000000c1840270 00000000 00000000 00000000 00001021
[ 853.920580] xhci_hcd 0000:01:00.0: @00000000c1840280 01000680 00120000 00000008 00000841
[ 853.920583] xhci_hcd 0000:01:00.0: @00000000c1840290 21a32d00 00000001 00000012 00010c05
[ 853.920586] xhci_hcd 0000:01:00.0: @00000000c18402a0 00000000 00000000 00000000 00001021
[ 853.920589] xhci_hcd 0000:01:00.0: @00000000c18402b0 02000680 002c0000 00000008 00000841
[ 853.920592] xhci_hcd 0000:01:00.0: @00000000c18402c0 00523780 00000001 0000002c 00010c05
[ 853.920595] xhci_hcd 0000:01:00.0: @00000000c18402d0 00000000 00000000 00000000 00001021
[ 853.920598] xhci_hcd 0000:01:00.0: @00000000c18402e0 02010680 00560000 00000008 00000841
[ 853.920601] xhci_hcd 0000:01:00.0: @00000000c18402f0 00523780 00000001 00000056 00010c05
[ 853.920604] xhci_hcd 0000:01:00.0: @00000000c1840300 00000000 00000000 00000000 00001021
[ 853.920607] xhci_hcd 0000:01:00.0: @00000000c1840310 00010900 00000000 00000008 00000841
[ 853.920611] xhci_hcd 0000:01:00.0: @00000000c1840320 00000000 00000000 00000000 00011021
[ 853.920614] xhci_hcd 0000:01:00.0: @00000000c1840330 00000102 00000081 00000008 00000841
[ 853.920617] xhci_hcd 0000:01:00.0: @00000000c1840340 00000000 00000000 00000000 00011021
[ 853.920620] xhci_hcd 0000:01:00.0: @00000000c1840350 00000102 00000081 00000008 00000841
[ 853.920623] xhci_hcd 0000:01:00.0: @00000000c1840360 00000000 00000000 00000000 00011021
[ 853.920626] xhci_hcd 0000:01:00.0: @00000000c1840370 00000102 00000081 00000008 00000841
[ 853.920629] xhci_hcd 0000:01:00.0: @00000000c1840380 00000000 00000000 00000000 00011021
[ 853.920632] xhci_hcd 0000:01:00.0: @00000000c1840390 00000102 00000081 00000008 00000841
[ 853.920635] xhci_hcd 0000:01:00.0: @00000000c18403a0 00000000 00000000 00000000 00011021
[ 853.920638] xhci_hcd 0000:01:00.0: @00000000c18403b0 01000680 00080000 00000008 00000841
[ 853.920641] xhci_hcd 0000:01:00.0: @00000000c18403c0 378e88a0 00000000 00000008 00010c05
[ 853.920644] xhci_hcd 0000:01:00.0: @00000000c18403d0 00000000 00000000 00000000 00001021
[ 853.920647] xhci_hcd 0000:01:00.0: @00000000c18403e0 01000680 00120000 00000008 00000841
[ 853.920650] xhci_hcd 0000:01:00.0: @00000000c18403f0 c1840000 00000000 00000000 00001803
[ 863.243667] xhci_hcd 0000:01:00.0: op reg status = 00000018
[ 863.243670] xhci_hcd 0000:01:00.0: Event ring dequeue ptr:
[ 863.243673] xhci_hcd 0000:01:00.0: @3781b4f0 01000000 00000000 01000000 00008800
[ 863.243676] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c024, 32'h18, 4'hf);
[ 863.243679] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 863.243681] xhci_hcd 0000:01:00.0: xhci_handle_event - OS owns TRB
[ 863.243684] xhci_hcd 0000:01:00.0: xhci_handle_event - calling handle_port_status
[ 863.243687] xhci_hcd 0000:01:00.0: Port Status Change Event for port 1
[ 863.243691] xhci_hcd 0000:01:00.0: Event ring deq = 0x3781b500 (DMA)
[ 863.243701] xhci_hcd 0000:01:00.0: xhci_handle_event - returned from handle_port_status
[ 863.243703] xhci_hcd 0000:01:00.0: In xhci_handle_event
[ 863.243708] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 64'hffffc9000064c638, 64'h3781b508, 4'hf);
[ 863.243716] hub 10-0:1.0: state 7 ports 2 chg 0000 evt 0002
[ 865.240011] xhci_hcd 0000:01:00.0: Timeout while waiting for a slot
[ 865.450012] xhci_hcd 0000:01:00.0: Slot ID 1 Input Context:
[ 865.450016] xhci_hcd 0000:01:00.0: @ffff880037949000 (virt) @37949000 (dma) 0x000000 - drop flags
[ 865.450020] xhci_hcd 0000:01:00.0: @ffff880037949004 (virt) @37949004 (dma) 0x000000 - add flags
[ 865.450023] xhci_hcd 0000:01:00.0: @ffff880037949008 (virt) @37949008 (dma) 0x000000 - rsvd2[0]
[ 865.450026] xhci_hcd 0000:01:00.0: @ffff88003794900c (virt) @3794900c (dma) 0x000000 - rsvd2[1]
[ 865.450029] xhci_hcd 0000:01:00.0: @ffff880037949010 (virt) @37949010 (dma) 0x000000 - rsvd2[2]
[ 865.450033] xhci_hcd 0000:01:00.0: @ffff880037949014 (virt) @37949014 (dma) 0x000000 - rsvd2[3]
[ 865.450036] xhci_hcd 0000:01:00.0: @ffff880037949018 (virt) @37949018 (dma) 0x000000 - rsvd2[4]
[ 865.450039] xhci_hcd 0000:01:00.0: @ffff88003794901c (virt) @3794901c (dma) 0x000000 - rsvd2[5]
[ 865.450042] xhci_hcd 0000:01:00.0: Slot Context:
[ 865.450044] xhci_hcd 0000:01:00.0: @ffff880037949020 (virt) @37949020 (dma) 0x8400000 - dev_info
[ 865.450047] xhci_hcd 0000:01:00.0: @ffff880037949024 (virt) @37949024 (dma) 0x010000 - dev_info2
[ 865.450050] xhci_hcd 0000:01:00.0: @ffff880037949028 (virt) @37949028 (dma) 0x000000 - tt_info
[ 865.450053] xhci_hcd 0000:01:00.0: @ffff88003794902c (virt) @3794902c (dma) 0x000000 - dev_state
[ 865.450056] xhci_hcd 0000:01:00.0: @ffff880037949030 (virt) @37949030 (dma) 0x000000 - rsvd[0]
[ 865.450059] xhci_hcd 0000:01:00.0: @ffff880037949034 (virt) @37949034 (dma) 0x000000 - rsvd[1]
[ 865.450063] xhci_hcd 0000:01:00.0: @ffff880037949038 (virt) @37949038 (dma) 0x000000 - rsvd[2]
[ 865.450066] xhci_hcd 0000:01:00.0: @ffff88003794903c (virt) @3794903c (dma) 0x000000 - rsvd[3]
[ 865.450068] xhci_hcd 0000:01:00.0: Endpoint 00 Context:
[ 865.450071] xhci_hcd 0000:01:00.0: @ffff880037949040 (virt) @37949040 (dma) 0x000000 - ep_info
[ 865.450074] xhci_hcd 0000:01:00.0: @ffff880037949044 (virt) @37949044 (dma) 0x2000026 - ep_info2
[ 865.450077] xhci_hcd 0000:01:00.0: @ffff880037949048 (virt) @37949048 (dma) 0xc1840120 - deq
[ 865.450080] xhci_hcd 0000:01:00.0: @ffff880037949050 (virt) @37949050 (dma) 0x000000 - tx_info
[ 865.450083] xhci_hcd 0000:01:00.0: @ffff880037949054 (virt) @37949054 (dma) 0x000000 - rsvd[0]
[ 865.450086] xhci_hcd 0000:01:00.0: @ffff880037949058 (virt) @37949058 (dma) 0x000000 - rsvd[1]
[ 865.450089] xhci_hcd 0000:01:00.0: @ffff88003794905c (virt) @3794905c (dma) 0x000000 - rsvd[2]
[ 865.450092] xhci_hcd 0000:01:00.0: Endpoint 01 Context:
[ 865.450094] xhci_hcd 0000:01:00.0: @ffff880037949060 (virt) @37949060 (dma) 0x000000 - ep_info
[ 865.450098] xhci_hcd 0000:01:00.0: @ffff880037949064 (virt) @37949064 (dma) 0x000000 - ep_info2
[ 865.450101] xhci_hcd 0000:01:00.0: @ffff880037949068 (virt) @37949068 (dma) 0x000000 - deq
[ 865.450103] xhci_hcd 0000:01:00.0: @ffff880037949070 (virt) @37949070 (dma) 0x000000 - tx_info
[ 865.450107] xhci_hcd 0000:01:00.0: @ffff880037949074 (virt) @37949074 (dma) 0x000000 - rsvd[0]
[ 865.450110] xhci_hcd 0000:01:00.0: @ffff880037949078 (virt) @37949078 (dma) 0x000000 - rsvd[1]
[ 865.450113] xhci_hcd 0000:01:00.0: @ffff88003794907c (virt) @3794907c (dma) 0x000000 - rsvd[2]
[ 865.450115] xhci_hcd 0000:01:00.0: Endpoint 02 Context:
[ 865.450118] xhci_hcd 0000:01:00.0: @ffff880037949080 (virt) @37949080 (dma) 0x000000 - ep_info
[ 865.450121] xhci_hcd 0000:01:00.0: @ffff880037949084 (virt) @37949084 (dma) 0x000000 - ep_info2
[ 865.450124] xhci_hcd 0000:01:00.0: @ffff880037949088 (virt) @37949088 (dma) 0x000000 - deq
[ 865.450127] xhci_hcd 0000:01:00.0: @ffff880037949090 (virt) @37949090 (dma) 0x000000 - tx_info
[ 865.450130] xhci_hcd 0000:01:00.0: @ffff880037949094 (virt) @37949094 (dma) 0x000000 - rsvd[0]
[ 865.450133] xhci_hcd 0000:01:00.0: @ffff880037949098 (virt) @37949098 (dma) 0x000000 - rsvd[1]
[ 865.450136] xhci_hcd 0000:01:00.0: @ffff88003794909c (virt) @3794909c (dma) 0x000000 - rsvd[2]
[ 865.450139] xhci_hcd 0000:01:00.0: Endpoint state = 0x1
[ 865.450142] xhci_hcd 0000:01:00.0: Command ring enq = 0x3781b3a0 (DMA)
[ 865.450145] xhci_hcd 0000:01:00.0: // Ding dong!
[ 865.450147] xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc9000064c800, 32'h0, 4'hf);
