Hi!
>>>>> ext Sergei Shtylyov writes:
> Yauheni Kaliuta wrote:
> >>>>>> ext Sergei Shtylyov writes:
> > > > From: Yauheni Kaliuta <yauheni.kaliuta@xxxxxxxxx>
[...]
> > > > diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c
> > > > index 0a50a35..830768f 100644
> > > > --- a/drivers/usb/musb/musb_gadget.c
> > > > +++ b/drivers/usb/musb/musb_gadget.c
> > > > @@ -1524,6 +1524,7 @@ static void musb_gadget_fifo_flush(struct usb_ep *ep)
> > > > csr = musb_readw(epio, MUSB_TXCSR);
> > > > if (csr & MUSB_TXCSR_FIFONOTEMPTY) {
> > > > csr |= MUSB_TXCSR_FLUSHFIFO | MUSB_TXCSR_P_WZC_BITS;
> > > > + csr &= ~MUSB_TXCSR_TXPKTRDY;
> > > CPU can't clear this bit according to the programming guide --
> > > it can only set the bit. So this should have no effect.
> > Ok, the situation is that it reads it and set again, so let's say "the
> > flush code should not set the flag".
> That should only happen if the bit gets cleared in between the read and write.
I would expect ZLP then, not max packet transfers.
--
WBR, Yauheni Kaliuta
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