Re: [PATCH 2/2] USB: gadget: update ci13xxx to work with g_ether

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On 12/12/2010 12:03 PM, Artem Leonenko wrote:
> On 12/11/2010 09:32 PM, Pavan Kondeti wrote:
>> Hi Artem,
>>
>> On 12/11/2010 11:42 PM, Artem Leonenko wrote:
>>> On 12/11/2010 06:14 AM, pkondeti@xxxxxxxxxxxxxx wrote:
>>> Do you suggest to wait until complete() callback finishes? The earlier
>>> we will prime EP the faster data will be transmitted.
>>>
>> I was saying that (b) is sufficient to fix the problem. I agree that
>> priming the endpoint before calling complete gives faster data rates.
> 
>> I was telling (b) and (c) are same.
> 
> I'm sorry, I misread that
> 
No problem :-)

>>>>> And as a part of the fix to make g_ether (and especially booting with
>>>>> NFS root) I had
>>>>> to increase NET_IP_ALIGN to mips32 natural value (4).
>>>>
>>>> I am not sure about the fix. But you might want to do this in a separate
>>>> patch.
>>>>
>>>
>>> Relaxing requirements on alignment will subtly increase memory usage but
>>> in the same will allow ci13xxx driver + g_ether to support more
>>> platforms. The ci13xxx driver supports rather big family of IP cores
>>> so the more we can support the better.
>>>
>>
>>> Can you try to test g_ether with your ci13xxx core with my patches? The
>>> ci13xxx IP cores have many different flavors/features depending on
>>> SoC/core instantiation. I wonder whether your core works with
>>> default alignment or not.
>>>
>> Sure. I will test it on monday. But am sure that it will work without
>> alignment change. Because g_ether is working fine on MSM with another
>> controller driver (not ci13xxx_udc).
> 
> Thanks. However it isn't clear to me how can you make an assumption
> about ci13xxx USB IP core based on features of other USB core. Yes
> there could be a chance that both cores have same feature.
> 
Sorry. I should have explained clearly. Initially I have posted another
controller driver for MSM SoC which has chipidea USB core. I have
received feedback to re-use ci13xxx_udc driver. I have seen g_ether
working fine without changing NET_IP_ALIGN with my initial driver.

Please see http://www.spinics.net/lists/linux-usb/msg38460.html

> FYI, comment from drivers/usb/gadget/amd5536udc.c file (also search
> for NET_IP_ALIGN in gadget/Kconfig):
> 
>> * UDC DMA requires 32-bit aligned buffers so DMA with gadget ether
> does not
>> * work without updating NET_IP_ALIGN. Or PIO mode (module param
> "use_dma=0")
>> * can be used with gadget ether.
> 
>  You see working g_ether with some UDCs doesn't guarantee that it will
> work with others. I have a proposal of relaxing alignment requirements
> and thus increasing the number of supported ci13xxx cores/their
> instantiations. Don't know if there is something better way to handle
> that. Any ideas?

There was some discussion happened on the same issue. But nothing is
finalized. I am also not sure about changing NET_IP_ALIGN macro as it
may have some other side effects (I was told changing NET_IP_ALIGN makes
parsing difficult in network layers and is inefficient).

http://www.spinics.net/lists/linux-usb/msg25411.html

> 
>> Thanks,
>> Pavan
>>
>>
> 
> --
> Cheers,
> Artem


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