Le mardi, 11 mai 2010 08.39:07, Sascha Hauer a écrit :
> On Mon, May 10, 2010 at 08:13:40PM +0200, Philippe Rétornaz wrote:
>
> > + if (cpu_is_mx31() && pdev->id == 0) {
> > + /* Wait for the controller to go idle */
> > + for (i = 0; i < 10000; i++) {
> > + if (readl(hcd->regs + USBSTS_OFFSET) & USBSTS_HCH)
> > + break;
> > + udelay(1);
> > + }
> > + if (i == 10000) {
> > + dev_err(dev, "Timeout while stopping USB controller\n");
> > + goto err_init;
> > + }
> > +
> > + /* Stop the usb controller */
> > + temp = readl(hcd->regs + USBCMD_OFFSET);
> > + writel(temp & (~USBCMD_RS), hcd->regs + USBCMD_OFFSET);
> > +
> > + for (i = 0; i < 10000; i++) {
> > + if (!(readl(hcd->regs + USBCMD_OFFSET) & USBCMD_RS))
> > + break;
> > + udelay(1);
> > + }
> > +
> > + if (i == 10000) {
> > + dev_err(dev, "Timeout while stopping USB controller\n");
> > + goto err_init;
> > + }
> > +
> > + /* Reset the usb controller */
> > + temp = readl(hcd->regs + USBCMD_OFFSET);
> > + writel(temp | USBCMD_RST, hcd->regs + USBCMD_OFFSET);
> > +
> > + for (i = 0; i < 10000; i++) {
> > + if (!(readl(hcd->regs + USBCMD_OFFSET) & USBCMD_RST))
> > + break;
> > + udelay(1);
> > + }
> > +
> > + if (i == 10000) {
> > + dev_err(dev, "Timeout while reseting USB controller\n");
> > + goto err_init;
> > + }
> > + }
>
> You add the resetting of the controller after setting up USBMODE/PORTSC
> setup. Wouldn't it be possible to change the order so that we do not
> have to do it twice?
I tried and it does work on host2, but not on OTG.
I did it this way so I don't change the behavior on other SoC or even on
host2.
> Also, I think the whole reset functionality should be a seperate
> function. I can imagine we'll need it elsewhere or on different SoCs in
> which case the if clause above gets complicated.
Ok.
Philippe
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