On Sat, Mar 06, 2010 at 04:17:23PM +0530, James Bottomley wrote: > On a fault in of exec data, we first try to get the page out of the page > cache. If it's not present, we put the faulting process to sleep and > fetch it in from storage. When we do the read, on the PIO path, the > kernel alias for the page becomes dirty. Some time later, we place the > page into the user space (updating the pte entry that caused a fault). > At this point, we'll call both flush_icache_page() and > update_mmu_cache() ... this is where the I/D resolution should be done. No - this is where things get extremely icky. The problem at this point occurs on SMP architectures. As soon as you update the PTE entry, it is visible to other threads of the application. If you do I-cache handling after updating the PTE, then there is a window where another CPU can execute the page: CPU0 CPU1 speculatively prefetches from page N via kernel mapping, loads garbage into I-cache attempts to execute P page fault page N allocated set_pte_at executes P *splat* flush I-cache -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
