On 10/18/2024 11:57 AM, Krzysztof Kozlowski wrote:
On Thu, Oct 17, 2024 at 05:10:54PM +0530, Uttkarsh Aggarwal wrote:
Adding a new 'snps,filter-se0-fsls-eop quirk' DT quirk to dwc3 core to set
GUCTL1 BIT 29. When set, controller will ignore single SE0 glitch on the
linestate during transmission. Only two or more SE0 is considered as
valid EOP on FS/LS port. This bit is applicable only in FS in device mode
and FS/LS mode of operation in host mode.
Why this is not device/compatible specific? Just like all other quirks
pushed last one year.
Hi Krzysztof,
Apologies for a late reply from our end.
In DWC3 core/dwc3-qcom atleast, there have been no compatible specific
quirks added. Also since this is a property of the Synopsys controller
hardware and not QC specific one, can we add it in bindings itself.
Because this is a property other vendors might also use and adding it
via compatible might not be appropriate.
Let us know your thoughts on this.
Regards,
Krishna,
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@xxxxxxxxxxx>
---
Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
index 1cd0ca90127d..d9e813bbcd80 100644
--- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
@@ -180,6 +180,12 @@ properties:
description: When set core will set Tx de-emphasis value
type: boolean
+ snps,filter-se0-fsls-eop-quirk:
+ description:
+ When set controller will ignore single SE0 glitch on the linestate during transmit
Does not look like wrapped according to coding style (checkpatch is not
a coding style document).
Best regards,
Krzysztof
