On 19/08/2023 05:17, Sam Protsenko wrote: > Implement Exynos850 USB 2.0 DRD PHY controller support. Exynos850 has > quite a different PHY controller than Exynos5 compatible controllers, > but it's still possible to implement it on top of existing > exynos5-usbdrd driver infrastructure. > > Only UTMI+ (USB 2.0) PHY interface is implemented, as Exynos850 doesn't > support USB 3.0. > > Only two clocks are used for this controller: > - phy: bus clock, used for PHY registers access > - ref: PHY reference clock (OSCCLK) > > Signed-off-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx> > --- Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
