On 8/8/23 11:37, Ladislav Michl wrote:
From: Ladislav Michl <ladis@xxxxxxxxxxxxxx> Although valid USB clock divider will be calculated for all valid Octeon core frequencies, make code formally correct limiting divider not to be greater that 7 so it fits into H_CLKDIV_SEL field. Signed-off-by: Ladislav Michl <ladis@xxxxxxxxxxxxxx> Reported-by: Linux Kernel Functional Testing <lkft@xxxxxxxxxx> Closes: https://qa-reports.linaro.org/lkft/linux-next-master/build/next-20230808/testrun/18882876/suite/build/test/gcc-8-cavium_octeon_defconfig/log --- Greg, if you want to resent whole serie, just drop me a note. Otherwise, this patch is meant to be applied on to of it. Thank you. drivers/usb/dwc3/dwc3-octeon.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@xxxxxxxxxx>
