On Sun, May 14, 2023, Krishna Kurapati wrote: > Currently for dwc3_usb31 controller, if maximum_speed is limited to > super-speed in DT, then device mode is limited to SS, but host mode > still works in SSP. > > The documentation for max-speed property is as follows: > > "Tells USB controllers we want to work up to a certain speed. > Incase this isn't passed via DT, USB controllers should default to > their maximum HW capability." > > It doesn't specify that the property is only for device mode. > There are cases where we need to limit the host's maximum speed to > SuperSpeed only. Use this property for host mode to contrain host's > speed to SuperSpeed. > > Signed-off-by: Krishna Kurapati <quic_kriskura@xxxxxxxxxxx> > --- > Link to v1: https://urldefense.com/v3/__https://lore.kernel.org/all/20230512170107.18821-1-quic_kriskura@xxxxxxxxxxx/__;!!A4F2R9G_pg!dCg_3WK2oNXNb6d0a_VuyjkeeZJTU1aY4dik6g35XB7mtG7EJeR1uPMfxFja49OfXp7Yhsg1yqjnylCYYEg7YCAhqfAZ0Q$ > > Discussion regarding the same at: > https://urldefense.com/v3/__https://lore.kernel.org/all/e465c69c-3a9d-cbdb-d44e-96b99cfa1a92@xxxxxxxxxxx/__;!!A4F2R9G_pg!dCg_3WK2oNXNb6d0a_VuyjkeeZJTU1aY4dik6g35XB7mtG7EJeR1uPMfxFja49OfXp7Yhsg1yqjnylCYYEg7YCDRLUrJWg$ > > drivers/usb/dwc3/core.c | 8 ++++++++ > drivers/usb/dwc3/core.h | 5 +++++ > 2 files changed, 13 insertions(+) > > diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c > index 278cd1c33841..33bc72595e74 100644 > --- a/drivers/usb/dwc3/core.c > +++ b/drivers/usb/dwc3/core.c > @@ -1262,6 +1262,14 @@ static int dwc3_core_init(struct dwc3 *dwc) > } > } > > + if ((hw_mode != DWC3_GHWPARAMS0_MODE_GADGET) && > + (DWC3_IP_IS(DWC31)) && > + (dwc->maximum_speed == USB_SPEED_SUPER)) { > + reg = dwc3_readl(dwc->regs, DWC3_LLUCTL); > + reg |= DWC3_LLUCTL_FORCE_GEN1; > + dwc3_writel(dwc->regs, DWC3_LLUCTL, reg); > + } > + Perhaps this should be done for every usb3 port rather than just the port_0. This patch can go after your multi-port series is added to Greg's branch where you can check for number of usb3 ports. Thanks, Thinh > return 0; > > err_power_off_phy: > diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h > index 1968638f29ed..5a251da309d4 100644 > --- a/drivers/usb/dwc3/core.h > +++ b/drivers/usb/dwc3/core.h > @@ -172,6 +172,8 @@ > #define DWC3_OEVTEN 0xcc0C > #define DWC3_OSTS 0xcc10 > > +#define DWC3_LLUCTL 0xd024 > + > /* Bit fields */ > > /* Global SoC Bus Configuration INCRx Register 0 */ > @@ -655,6 +657,9 @@ > #define DWC3_OSTS_VBUSVLD BIT(1) > #define DWC3_OSTS_CONIDSTS BIT(0) > > +/* Force Gen1 speed on Gen2 link */ > +#define DWC3_LLUCTL_FORCE_GEN1 BIT(10) > + > /* Structures */ > > struct dwc3_trb; > -- > 2.40.0 >
